coreboot-gerrit July 2013

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: aa5d337 w83627hf/acpi: Fix endianess error in floppy drive enumeration code
by Christoph Grenz 03 Jul '13

03 Jul '13

Christoph Grenz (christophg+cb(a)grenz-bonn.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3602 -gerrit commit aa5d3373563760390f3c34a0d8d0366eff4eaefd Author: Christoph Grenz <christophg+cb(a)grenz-bonn.de> Date: Thu Jul 4 02:51:42 2013 +0200 w83627hf/acpi: Fix endianess error in floppy drive enumeration code The enumeration results are stored as five DWORDs in one 20 byte buffer. Bytes 3, 7, 11 and 15 were used to set … [View More]

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Patch set updated for coreboot: b656b2e w83627hf/acpi: Fix type error in floppy drive enumeration code
by Christoph Grenz 03 Jul '13

03 Jul '13

Christoph Grenz (christophg+cb(a)grenz-bonn.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3603 -gerrit commit b656b2e4fb95492623d371c5e0e87ba3ed7fbd08 Author: Christoph Grenz <christophg+cb(a)grenz-bonn.de> Date: Thu Jul 4 02:54:04 2013 +0200 w83627hf/acpi: Fix type error in floppy drive enumeration code The enumeration method tried to evaluate an one-byte OperationRegion instead of a field in this OperationRegion, … [View More]

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Patch set updated for coreboot: 2374c25 w83627hf/acpi: Move floppy drive enumeration from _INI into _FDE.
by Christoph Grenz 03 Jul '13

03 Jul '13

Christoph Grenz (christophg+cb(a)grenz-bonn.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3604 -gerrit commit 2374c25bd2e6ea44d2b34d10eb35e3eb37659976 Author: Christoph Grenz <christophg+cb(a)grenz-bonn.de> Date: Thu Jul 4 03:06:26 2013 +0200 w83627hf/acpi: Move floppy drive enumeration from _INI into _FDE. Move the floppy drive enumeration from _INI() and PROB(), which stored the enumeration results into _FDE into _FDE(… [View More]). _INI is called by any ACPI-capable OS on boot while _FDE is rarely used. So it's better to run the enumeration when requested rather than unconditionally. Change-Id: Icf1e2a551806592faa8ba8d80fa8d02681602007 Signed-off-by: Christoph Grenz <christophg+cb(a)grenz-bonn.de> --- src/superio/winbond/w83627hf/acpi/superio.asl | 59 ++++++++++++--------------- 1 file changed, 25 insertions(+), 34 deletions(-) diff --git a/src/superio/winbond/w83627hf/acpi/superio.asl b/src/superio/winbond/w83627hf/acpi/superio.asl index e8c031a..6dc08b9 100644 --- a/src/superio/winbond/w83627hf/acpi/superio.asl +++ b/src/superio/winbond/w83627hf/acpi/superio.asl @@ -211,24 +211,6 @@ Device(SIO) { Name (_STR, Unicode ("W83627HF Floppy Disk Controller")) Name (_UID, "w83627hf-fdc") - #ifndef NO_W83627HF_FDC_ENUM - /* Initialization method: Should be run once on boot - If FDC is active, enumerate all connected devices */ - Method (_INI) { - ENCM (0) - Store (ACTR, Local0) - Store (IO1H, Local1) - Store (IO1L, Local2) - EXCM () - ShiftLeft(Local1, 8, Local1) - Or(Local1, Local2, Local1) - If (Local0) { - /* Try probing drives and save result in _FDE */ - PROB(Local1) - } - } - #endif - Method (_STA) { Store (0x00, Local0) @@ -316,18 +298,33 @@ Device(SIO) { } #ifndef NO_W83627HF_FDC_ENUM - Name(_FDE, Buffer(){0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) - #endif - - Method (PROB, 1) { - #ifndef NO_W83627HF_FDC_ENUM - /* Try probing drives and save result in _FDE + Method (_FDE, 0) { + /* Try probing drives. Probing is done through selecting and activating a drive and reading 0x03F7 aka the "shared IDE and floppy register" as any value there besides zero seems to indicate a connected drive. */ - OperationRegion (FIO1, SystemIO, Arg0, 0x06) + // Create template + Name(FDE, Buffer(){0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) + CreateByteField (FDE, 1, FD1) + CreateByteField (FDE, 4, FD2) + CreateByteField (FDE, 8, FD3) + CreateByteField (FDE, 12, FD4) + + // Get resources from logical device + ENCM (0) + Store (ACTR, Local0) + Store (IO1H, Local1) + Store (IO1L, Local2) + EXCM () + ShiftLeft(Local1, 8, Local1) + Or(Local1, Local2, Local1) + If (LNot(Local0)) { + Return (FDE) + } + + OperationRegion (FIO1, SystemIO, Local1, 0x06) Field (FIO1, ByteAcc, NoLock, Preserve) { Offset(0x02), @@ -355,11 +352,6 @@ Device(SIO) { SIFR, 8 } - CreateByteField (_FDE, 1, FD1) - CreateByteField (_FDE, 4, FD2) - CreateByteField (_FDE, 8, FD3) - CreateByteField (_FDE, 12, FD4) - Store(One, ACT1) Store(0, SELE) Sleep(0x64) @@ -384,8 +376,10 @@ Device(SIO) { If (SIFR) { Store (One, FD4) } Store(Zero, ACT4) Store(Zero, SELE) - #endif + + Return (FDE) } + #endif Method (_SRS, 1, Serialized) @@ -406,9 +400,6 @@ Device(SIO) { Store (Local1, IO1H) Store (One, ACTR) EXCM () - - /* Try probing drives and save result in _FDE */ - PROB(IOA0) } } #endif [View Less]

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New patch to review for coreboot: 4c03f2f w83627hf/acpi: Move floppy drive enumeration from _INI into _FDE.
by Christoph Grenz 03 Jul '13

03 Jul '13

Christoph Grenz (christophg+cb(a)grenz-bonn.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3604 -gerrit commit 4c03f2fa39f2b0e43314ac8c8c3beafeaa2fb8bb Author: Christoph Grenz <christophg+cb(a)grenz-bonn.de> Date: Thu Jul 4 03:06:26 2013 +0200 w83627hf/acpi: Move floppy drive enumeration from _INI into _FDE. Move the floppy drive enumeration from _INI() and PROB(), which stored the enumeration results into _FDE into _FDE(… [View More]). _INI is called by any ACPI-capable OS on boot while _FDE is rarely used. So it's better to run the enumeration when requested rather than unconditionally. Change-Id: Icf1e2a551806592faa8ba8d80fa8d02681602007 Signed-off-by: Christoph Grenz <christophg+cb(a)grenz-bonn.de> --- src/superio/winbond/w83627hf/acpi/superio.asl | 59 ++++++++++++--------------- 1 file changed, 25 insertions(+), 34 deletions(-) diff --git a/src/superio/winbond/w83627hf/acpi/superio.asl b/src/superio/winbond/w83627hf/acpi/superio.asl index e8c031a..6dc08b9 100644 --- a/src/superio/winbond/w83627hf/acpi/superio.asl +++ b/src/superio/winbond/w83627hf/acpi/superio.asl @@ -211,24 +211,6 @@ Device(SIO) { Name (_STR, Unicode ("W83627HF Floppy Disk Controller")) Name (_UID, "w83627hf-fdc") - #ifndef NO_W83627HF_FDC_ENUM - /* Initialization method: Should be run once on boot - If FDC is active, enumerate all connected devices */ - Method (_INI) { - ENCM (0) - Store (ACTR, Local0) - Store (IO1H, Local1) - Store (IO1L, Local2) - EXCM () - ShiftLeft(Local1, 8, Local1) - Or(Local1, Local2, Local1) - If (Local0) { - /* Try probing drives and save result in _FDE */ - PROB(Local1) - } - } - #endif - Method (_STA) { Store (0x00, Local0) @@ -316,18 +298,33 @@ Device(SIO) { } #ifndef NO_W83627HF_FDC_ENUM - Name(_FDE, Buffer(){0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) - #endif - - Method (PROB, 1) { - #ifndef NO_W83627HF_FDC_ENUM - /* Try probing drives and save result in _FDE + Method (_FDE, 0) { + /* Try probing drives. Probing is done through selecting and activating a drive and reading 0x03F7 aka the "shared IDE and floppy register" as any value there besides zero seems to indicate a connected drive. */ - OperationRegion (FIO1, SystemIO, Arg0, 0x06) + // Create template + Name(FDE, Buffer(){0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) + CreateByteField (FDE, 1, FD1) + CreateByteField (FDE, 4, FD2) + CreateByteField (FDE, 8, FD3) + CreateByteField (FDE, 12, FD4) + + // Get resources from logical device + ENCM (0) + Store (ACTR, Local0) + Store (IO1H, Local1) + Store (IO1L, Local2) + EXCM () + ShiftLeft(Local1, 8, Local1) + Or(Local1, Local2, Local1) + If (LNot(Local0)) { + Return (FDE) + } + + OperationRegion (FIO1, SystemIO, Local1, 0x06) Field (FIO1, ByteAcc, NoLock, Preserve) { Offset(0x02), @@ -355,11 +352,6 @@ Device(SIO) { SIFR, 8 } - CreateByteField (_FDE, 1, FD1) - CreateByteField (_FDE, 4, FD2) - CreateByteField (_FDE, 8, FD3) - CreateByteField (_FDE, 12, FD4) - Store(One, ACT1) Store(0, SELE) Sleep(0x64) @@ -384,8 +376,10 @@ Device(SIO) { If (SIFR) { Store (One, FD4) } Store(Zero, ACT4) Store(Zero, SELE) - #endif + + Return (FDE) } + #endif Method (_SRS, 1, Serialized) @@ -406,9 +400,6 @@ Device(SIO) { Store (Local1, IO1H) Store (One, ACTR) EXCM () - - /* Try probing drives and save result in _FDE */ - PROB(IOA0) } } #endif [View Less]

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New patch to review for coreboot: afff4d2 w83627hf/acpi: Fix type error in floppy drive enumeration code
by Christoph Grenz 03 Jul '13

03 Jul '13

Christoph Grenz (christophg+cb(a)grenz-bonn.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3603 -gerrit commit afff4d2e00cafa909444569bb2a6bebb7672de58 Author: Christoph Grenz <christophg+cb(a)grenz-bonn.de> Date: Thu Jul 4 02:54:04 2013 +0200 w83627hf/acpi: Fix type error in floppy drive enumeration code The enumeration method tried to evaluate an one-byte OperationRegion instead of a field in this OperationRegion, … [View More]

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New patch to review for coreboot: 7551db6 w83627hf/acpi: Fix endianess error in floppy drive enumeration code
by Christoph Grenz 03 Jul '13

03 Jul '13

Christoph Grenz (christophg+cb(a)grenz-bonn.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3602 -gerrit commit 7551db6fcba4f7ba0aa27c21bdd41dfebab7fd5f Author: Christoph Grenz <christophg+cb(a)grenz-bonn.de> Date: Thu Jul 4 02:51:42 2013 +0200 w83627hf/acpi: Fix endianess error in floppy drive enumeration code The enumeration results are stored as five DWORDs in one 20 byte buffer. Bytes 3, 7, 11 and 15 were used to set … [View More]

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Patch merged into coreboot/master: 9e97423 intel/i5000: Use MMCONF_SUPPORT_DEFAULT
by gerrit＠coreboot.org 03 Jul '13

03 Jul '13

the following patch was just integrated into master: commit 9e974232e4896ee971745c5127cbc37f1682171b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Jul 1 11:21:53 2013 +0300 intel/i5000: Use MMCONF_SUPPORT_DEFAULT Change all PCI configuration accesses to MMIO on two boards with i5000 chipset. To enable MMIO style access, add explicit PCI IO config write in the bootblock. Change-Id: I26f1c2da5ae98aeeda78bdcae0fb1e8c711a3586 Signed-off-by: … [View More]

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Patch merged into coreboot/master: 575e681 Move select MMCONF_SUPPORT under northbridge (fix)
by gerrit＠coreboot.org 03 Jul '13

03 Jul '13

the following patch was just integrated into master: commit 575e6817e690d1540bfa14a0b1fc7b8a40ef095a Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Jul 2 11:37:35 2013 +0300 Move select MMCONF_SUPPORT under northbridge (fix) I missed the board with gm45 when I moved MMCONF_SUPPORT lines. Also, the intel/i3100 does not have MMCONF_SUPPORT implemented even though it was previously selected for intel/eagleheights board. Change-Id: … [View More]

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New patch to review for coreboot: 4cf124f intel/i5000: Use MMCONF_SUPPORT_DEFAULT
by Kyösti Mälkki 03 Jul '13

03 Jul '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3601 -gerrit commit 4cf124f57faa59f49cf06f8ecc8a762bf5bde785 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Jul 1 11:21:53 2013 +0300 intel/i5000: Use MMCONF_SUPPORT_DEFAULT Change all PCI configuration accesses to MMIO on two boards with i5000 chipset. To enable MMIO style access, add explicit PCI IO config write in the … [View More]bootblock. Change-Id: I26f1c2da5ae98aeeda78bdcae0fb1e8c711a3586 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/asus/dsbf/romstage.c | 4 ---- src/mainboard/supermicro/x7db8/romstage.c | 4 ---- src/northbridge/intel/i5000/Kconfig | 10 +++++++++- src/northbridge/intel/i5000/bootblock.c | 21 +++++++++++++++++++++ 4 files changed, 30 insertions(+), 9 deletions(-) diff --git a/src/mainboard/asus/dsbf/romstage.c b/src/mainboard/asus/dsbf/romstage.c index cb63f45..f4e65cb 100644 --- a/src/mainboard/asus/dsbf/romstage.c +++ b/src/mainboard/asus/dsbf/romstage.c @@ -129,10 +129,6 @@ void main(unsigned long bist) enable_smbus(); - /* setup PCIe MMCONF base address */ - pci_write_config32(PCI_DEV(0, 16, 0), 0x64, - CONFIG_MMCONF_BASE_ADDRESS >> 16); - smbus_write_byte(0x6f, 0x00, 0x63); smbus_write_byte(0x6f, 0x01, 0x04); smbus_write_byte(0x6f, 0x02, 0x53); diff --git a/src/mainboard/supermicro/x7db8/romstage.c b/src/mainboard/supermicro/x7db8/romstage.c index fa73412..bc54ed7 100644 --- a/src/mainboard/supermicro/x7db8/romstage.c +++ b/src/mainboard/supermicro/x7db8/romstage.c @@ -128,10 +128,6 @@ void main(unsigned long bist) enable_smbus(); - /* setup PCIe MMCONF base address */ - pci_write_config32(PCI_DEV(0, 16, 0), 0x64, - CONFIG_MMCONF_BASE_ADDRESS >> 16); - outb(0x07, 0x11b8); /* These are smbus write captured with serialice. They diff --git a/src/northbridge/intel/i5000/Kconfig b/src/northbridge/intel/i5000/Kconfig index b9c3547..f7344ca 100644 --- a/src/northbridge/intel/i5000/Kconfig +++ b/src/northbridge/intel/i5000/Kconfig @@ -20,9 +20,17 @@ config NORTHBRIDGE_INTEL_I5000 bool select MMCONF_SUPPORT + select MMCONF_SUPPORT_DEFAULT select HAVE_DEBUG_RAM_SETUP +if NORTHBRIDGE_INTEL_I5000 + config NORTHBRIDGE_INTEL_I5000_RAM_CHECK bool prompt "Run ramcheck after RAM initialization" - depends on NORTHBRIDGE_INTEL_I5000 + +config BOOTBLOCK_NORTHBRIDGE_INIT + string + default "northbridge/intel/i5000/bootblock.c" + +endif diff --git a/src/northbridge/intel/i5000/bootblock.c b/src/northbridge/intel/i5000/bootblock.c new file mode 100644 index 0000000..eabbee6 --- /dev/null +++ b/src/northbridge/intel/i5000/bootblock.c @@ -0,0 +1,21 @@ +#include <arch/io.h> + +static void bootblock_northbridge_init(void) +{ + /* + * The "io" variant of the config access is explicitly used to + * setup the PCIEXBAR because CONFIG_MMCONF_SUPPORT_DEFAULT is set to + * to true. That way all subsequent non-explicit config accesses use + * MCFG. This code also assumes that bootblock_northbridge_init() is + * the first thing called in the non-asm boot block code. The final + * assumption is that no assembly code is using the + * CONFIG_MMCONF_SUPPORT_DEFAULT option to do PCI config acceses. + * + * The PCIEXBAR is assumed to live in the memory mapped IO space under + * 4GiB. + */ + + /* setup PCIe MMCONF base address */ + pci_io_write_config32(PCI_DEV(0, 16, 0), 0x64, + CONFIG_MMCONF_BASE_ADDRESS >> 16); +} [View Less]

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New patch to review for coreboot: 1107a3c intel/gm45: Use MMCONF_SUPPORT_DEFAULT
by Kyösti Mälkki 03 Jul '13

03 Jul '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3600 -gerrit commit 1107a3c55dce8b3b6c41002f7c8836ff1cccd95d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Jul 1 11:21:53 2013 +0300 intel/gm45: Use MMCONF_SUPPORT_DEFAULT Change all PCI configuration accesses to MMIO for all boards with gm45 chipset. To enable MMIO style access, add explicit PCI IO config write in the … [View More]bootblock. Change-Id: Id1c839b7d669946e0ca8b6837e5152ebcb9cd334 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/intel/gm45/Kconfig | 4 ++++ src/northbridge/intel/gm45/bootblock.c | 27 +++++++++++++++++++++++++++ src/northbridge/intel/gm45/early_init.c | 5 ----- 3 files changed, 31 insertions(+), 5 deletions(-) diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 16a0bf1..adf1c1b 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -29,4 +29,8 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select MMCONF_SUPPORT_DEFAULT select IOMMU +config BOOTBLOCK_NORTHBRIDGE_INIT + string + default "northbridge/intel/gm45/bootblock.c" + endif diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c new file mode 100644 index 0000000..fb40b94 --- /dev/null +++ b/src/northbridge/intel/gm45/bootblock.c @@ -0,0 +1,27 @@ +#include <arch/io.h> + +/* Just re-define these instead of including gm45.h. It blows up romcc. */ +#define D0F0_PCIEXBAR_LO 0x60 +#define D0F0_PCIEXBAR_HI 0x64 + +static void bootblock_northbridge_init(void) +{ + uint32_t reg; + + /* + * The "io" variant of the config access is explicitly used to + * setup the PCIEXBAR because CONFIG_MMCONF_SUPPORT_DEFAULT is set to + * to true. That way all subsequent non-explicit config accesses use + * MCFG. This code also assumes that bootblock_northbridge_init() is + * the first thing called in the non-asm boot block code. The final + * assumption is that no assembly code is using the + * CONFIG_MMCONF_SUPPORT_DEFAULT option to do PCI config acceses. + * + * The PCIEXBAR is assumed to live in the memory mapped IO space under + * 4GiB. + */ + reg = 0; + pci_io_write_config32(PCI_DEV(0,0,0), D0F0_PCIEXBAR_HI, reg); + reg = CONFIG_MMCONF_BASE_ADDRESS | (2 << 1) | 1; /* 64MiB - 0-63 buses. */ + pci_io_write_config32(PCI_DEV(0,0,0), D0F0_PCIEXBAR_LO, reg); +} diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c index 052c517..ed5bf99 100644 --- a/src/northbridge/intel/gm45/early_init.c +++ b/src/northbridge/intel/gm45/early_init.c @@ -25,11 +25,6 @@ void gm45_early_init(void) { const device_t d0f0 = PCI_DEV(0, 0, 0); - /* Setup PCIEXBAR. */ - pci_io_write_config32(d0f0, D0F0_PCIEXBAR_LO, - /* 64MB, enable */ - DEFAULT_PCIEXBAR | (2 << 1) | 1); - /* Setup MCHBAR. */ pci_write_config32(d0f0, D0F0_MCHBAR_LO, DEFAULT_MCHBAR | 1); [View Less]

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coreboot-gerrit July 2013