coreboot-gerrit July 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 4d409b5 usbdebug: Refactor disable logic
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 4d409b5fc27e44f7c902f8402f661db56d62ac74 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Jul 5 21:38:54 2013 +0300 usbdebug: Refactor disable logic Output to usbdebug console needs to be disabled until hardware is initialized and while EHCI BAR is relocated. Add separate field ehci_info to point to back to EHCI context when hardware is ready to transfer data. Change-Id: If7d441b561819ab8ae23ed9f3f320f7742ed231e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3624 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> See http://review.coreboot.org/3624 for details. -gerrit

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Patch merged into coreboot/master: d686acd pit: Redo the display port bridge initialization code.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit d686acd1a358518e8f37452c0e826a3ac381cbe2 Author: Gabe Black <gabeblack(a)google.com> Date: Sun Jun 30 05:19:53 2013 -0700 pit: Redo the display port bridge initialization code. The display port bridge on pit is different from the one on snow and needs to be initialized differently. Instead of waiting for the chip to come up on its own and assert the hotplug detect, we need to access it over i2c and get it up and running ourselves. Change-Id: I4bc911cb8e4463edff7beabd2f356cb70ae9f507 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3723 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3723 for details. -gerrit

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Patch merged into coreboot/master: 0570286 pit: Enable the ps8625 driver.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 0570286849b856aff304f5b6cb50c29cde5f1308 Author: Gabe Black <gabeblack(a)google.com> Date: Sun Jun 30 06:09:12 2013 -0700 pit: Enable the ps8625 driver. Change-Id: Id1277ceefc844a052627483e6c9d01bcb5da975f Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3722 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3722 for details. -gerrit

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Patch merged into coreboot/master: 2ddc9ea parade: Add a driver for the parade ps8625.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 2ddc9ea0c887d77b242b361d650660f1a788abe5 Author: Gabe Black <gabeblack(a)google.com> Date: Sun Jun 30 05:56:26 2013 -0700 parade: Add a driver for the parade ps8625. This driver is basically the same as the one in U-Boot but without the device tree stuff. That driver is, in turn, a straightforward implementation of the sequence of register writes described in the data sheet. Comments were added in U-Boot which helpfully describe what the register writes are actually doing and are kept. Change-Id: I64ba6b373478853bb2120f0553a43de901170d02 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: http://review.coreboot.org/3753 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3753 for details. -gerrit

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Patch merged into coreboot/master: a5dc091 i2c: Change the type of the data parameter to uint8_t.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit a5dc0911293d4bdc7e1a0c5a2e3abd80ee51b857 Author: Gabe Black <gabeblack(a)google.com> Date: Sun Jun 30 03:47:33 2013 -0700 i2c: Change the type of the data parameter to uint8_t. Data is intended to be a byte array, so it should be described by a type which has a fixed size equal to an 8 bit byte. Also, the data passed to write shouldn't be modified and can be const. Change-Id: I6466303d962998f6c37c2d4006a39c2d79a235c1 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3721 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3721 for details. -gerrit

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Patch merged into coreboot/master: 3858b3f pit: Stop setting up the hardware dp hotplug detect in ROM stage too.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 3858b3f698d75e05206a8ef8578796f8456e5450 Author: Gabe Black <gabeblack(a)google.com> Date: Sun Jun 30 03:37:24 2013 -0700 pit: Stop setting up the hardware dp hotplug detect in ROM stage too. This was removed from ramstage a little while ago and should have been removed from here as well. Change-Id: I6a40ed4a98bedac39e5492e4b1aed3427ab4e08b Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3720 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3720 for details. -gerrit

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Patch merged into coreboot/master: 88ac9b5 PIT: add panel to the list of things to be powered up by the PMIC
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 88ac9b5a1ef756e0151238e51090a70e7640fd54 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Wed Jun 26 17:28:52 2013 -0700 PIT: add panel to the list of things to be powered up by the PMIC This appears to be needed, though we have no way to test yet. Change-Id: I39033581011e056258193f2cdff78814361a8d55 Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3719 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3719 for details. -gerrit

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Patch merged into coreboot/master: da7b8e4 armv7/exynos: Prevent unexpected reboots in resume.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit da7b8e4de9a690cbed00a361d282b18792c676d6 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Fri Jun 28 17:27:17 2013 +0800 armv7/exynos: Prevent unexpected reboots in resume. In resume path, if memory setup takes too long without setting PS_HOLD, EC watch dog may power off or reboot the system. To prevent that, we should enable PS_HOLD in same timing as cold boot - right before starting memory setup. Change-Id: I5c294fa7ae015f8cff57b1fd81e5b80902647b15 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3718 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3718 for details. -gerrit

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Patch merged into coreboot/master: c0b2144 pit: Replace the tps65090 functions and adjust the hotplug detect line.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit c0b2144f698fdf82a2402db6b6038e70b19ba984 Author: Gabe Black <gabeblack(a)google.com> Date: Fri Jun 28 14:27:16 2013 -0700 pit: Replace the tps65090 functions and adjust the hotplug detect line. The functions which manipulated the tps65090 were removed a while ago because it isn't accessible directly from the AP, it's on an I2C bus that has to be accessed by the EC on our behalf. Now that that capability has been added, we can rewrite the small portion of the the tps65090 we actually used but using the EC passthrough commands. Also, we should not be configuring the hardware display port hotplug detect line since we're using it as a GPIO for other purposes. The GPIO we're using instead defaults to being an input, but to be safe we should probably explicitly configure it as one anyway. Change-Id: I7f8a8a767e3cccb813513940a5feceea482982f5 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3717 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3717 for details. -gerrit

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Patch merged into coreboot/master: 9f96aa6 chromeec: Add a function to send passthrough i2c messages.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 9f96aa6b5e6bc5af8feb7bb29239f8421ded1f14 Author: Gabe Black <gabeblack(a)google.com> Date: Fri Jun 28 14:24:33 2013 -0700 chromeec: Add a function to send passthrough i2c messages. Change-Id: I576d0dbf65693f40d7d1c20d3d5e7a75b8e14dc9 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: http://review.coreboot.org/3752 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3752 for details. -gerrit

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coreboot-gerrit July 2013