coreboot-gerrit July 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 2d2e37f exynos5420: Change some clock settings.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 2d2e37fc526741a7308b88c794729295a2c5e3cd Author: Gabe Black <gabeblack(a)google.com> Date: Sat Jun 22 20:05:37 2013 -0700 exynos5420: Change some clock settings. This change adjusts some clock settings so that they match U-Boot. There are three different changes. 1. Change the source for psgen from the oscillator clock to the pclk. 2. Change the pll feeding the SPI busses from epll to mpll, as suggested in the manual. 3. Change the SPI prescaller. Change-Id: Ib54a255bc14fc286629dac86db9b8cf8e75a610b Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3700 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3700 for details. -gerrit

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Patch merged into coreboot/master: cf7509c exynos5420: Fix the way the rate of the input clock for i2c buses is found.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit cf7509cfd1c775f4ee664f7784257c73bffd1513 Author: Gabe Black <gabeblack(a)google.com> Date: Sat Jun 22 19:43:40 2013 -0700 exynos5420: Fix the way the rate of the input clock for i2c buses is found. The clock divider was being read from registers incorrectly which meant that the periph rate was wrong. Change-Id: I50efb62849ef29bdfb0efc56c49642d3edca094c Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3699 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3699 for details. -gerrit

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Patch merged into coreboot/master: 7dd5814 snow: Add flush to UART driver.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 7dd581494dbaff64e4a2dd31f29cb254104d2d03 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Jun 5 14:06:55 2013 -0700 snow: Add flush to UART driver. Wait for UART FIFO to be ready. (Credit to dhendrix for finding the bits to test with.) Change-Id: Ib6733e422cbc1c61b942bd90d85f88a3f412d6ff Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3698 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3698 for details. -gerrit

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Patch merged into coreboot/master: ce7a5a7 ec/chromeec: Merge upstream V3 structure and constant definition.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit ce7a5a790be1cd734c5d1c9f934ade0433c0b96b Author: Hung-Te Lin <hungte(a)chromium.org> Date: Thu Jun 20 18:57:04 2013 +0800 ec/chromeec: Merge upstream V3 structure and constant definition. Chrome EC protocol V3 has several new command structure and constants defined. Simply cherry-picking changes from upstream. Change-Id: I7cb61d3b632ff32743e4fa312e0cc691c1c4c663 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/3748 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3748 for details. -gerrit

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Patch merged into coreboot/master: 3a0d0d8 Exynos5420: Initialize USB PHY
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 3a0d0d8622c9f4f14116ecb3f265dddf52fece84 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 20 16:13:19 2013 -0700 Exynos5420: Initialize USB PHY ... this is needed for libpayload to talk to USB devices. (forward ported from https://gerrit.chromium.org/gerrit/#/c/55554) Change-Id: I5a20864689efd0c0149775e6d85b658e0cc6715c Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3697 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3697 for details. -gerrit

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Patch merged into coreboot/master: 2ad63c2 Exynos5250: Initialize USB PHY
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 2ad63c2e08de2cccc7de42c4c3c5efeec7af25ad Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri May 17 11:52:45 2013 -0700 Exynos5250: Initialize USB PHY ... this is needed for libpayload to talk to USB devices. Change-Id: I7eb19003c9e96efb5fa7a3f97c7b15f3ef332687 Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3696 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3696 for details. -gerrit

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Patch merged into coreboot/master: 062c17b Exynos: Only compile UART in if serial console is selected
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 062c17bb78825a304aefd8b53d07c7be38211e42 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 19 15:51:04 2013 -0700 Exynos: Only compile UART in if serial console is selected Change-Id: I5cddffc2e524aae7a31a8f94f67e03a5b7e15c82 Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3695 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3695 for details. -gerrit

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Patch merged into coreboot/master: 9d9b0dd Don't try to use CBMEM console in bootblock
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 9d9b0dd20980c5e9b2cafb07c03775bbaa249ea2 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 19 15:44:36 2013 -0700 Don't try to use CBMEM console in bootblock Otherwise we have to worry about hand off between bootblock and romstage. Too much complexity Change-Id: I89bf8a229dba7e1330accadf9a732d831ebc4827 Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3694 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3694 for details. -gerrit

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Patch merged into coreboot/master: 0051510 Exynos5420: add code to make sure resume will work on DRAM.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 005151047ed5ab875905a5b3ee3942d09039b945 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Wed Jun 19 15:46:25 2013 -0700 Exynos5420: add code to make sure resume will work on DRAM. Found during a perusal of u-boot changes. It looks important. For more info: http://git.chromium.org/gitweb/?p=chromiumos/third_party/u-boot.git;a=commi… Change-Id: Ida2fe2a98be008a4bdfe594cf00d01a33b511b4f Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3693 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3693 for details. -gerrit

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Patch merged into coreboot/master: 6b0bab9 ARMv7: Drop duplicate call to bootblock_cpu_init()
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 6b0bab916a59c6270a1f0fd53002e568052f2b45 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 12 17:07:05 2013 -0700 ARMv7: Drop duplicate call to bootblock_cpu_init() This is already called in ARMv7 bootblock_simple.c so we don't want to do it twice Change-Id: I80cb41035b8a77787e04f2ea58a1cd372cea97d8 Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3692 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3692 for details. -gerrit

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coreboot-gerrit July 2013