coreboot-gerrit July 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: d2f45c6 Simplify early / bootblock console code
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit d2f45c651694b2ada2443bb12def23e6c7910b10 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 19 13:42:00 2013 -0700 Simplify early / bootblock console code Change-Id: I6b28bb95c7decbe3eed33b5b5a029bee48bbe403 Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3691 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3691 for details. -gerrit

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Patch merged into coreboot/master: b919809 ARM: Don't leave alignment checking on after the exception test.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit b919809afeaf3c571961ead626c04b8f9e258e11 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 20:15:57 2013 -0700 ARM: Don't leave alignment checking on after the exception test. Currently, the exception handling code on ARM turns on alignment checks as an easy way to generate an exception for testing purposes. It was leaving it on which disabled unaligned accesses for other, unlreated code running later. This change adjusts the code so the original value of the alignment bit is restored after the test exception. Change-Id: Id8d035a05175f9fb13de547ab4aa5496d681d30c Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3690 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3690 for details. -gerrit

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Patch merged into coreboot/master: 63bb610 pit: Replace the snow GPIO indexes with ones for pit.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 63bb610abb9ffa244a6571132813388a485141c9 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 03:29:45 2013 -0700 pit: Replace the snow GPIO indexes with ones for pit. The GPIOs used by vboot and setting up the display and backlight were still the ones for snow. This change updates them so they're correct for pit. Change-Id: I06ba773da3af249efec723bb90c2e9e8075a777a Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3689 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3689 for details. -gerrit

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Patch merged into coreboot/master: fdd2356 pit: Remove the MAX_CPUS option.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit fdd2356b5766e0e8a95b54d1d56f5c9340c95832 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 02:37:51 2013 -0700 pit: Remove the MAX_CPUS option. The MAX_CPUS option is only used on x86 currently, so there's no reason to have it in the pit config. Change-Id: I270bbfd3aff781d88304791b1d9735777643caab Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3688 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3688 for details. -gerrit

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Patch merged into coreboot/master: 16c1480 pit: Stop compiling in the max77686 driver on pit.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 16c14801b652c0753348d5d43216dda38e87e5b1 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 02:18:25 2013 -0700 pit: Stop compiling in the max77686 driver on pit. That part isn't used on pit. Change-Id: I48f3a10f7e6eb89b1e9630d2372b6865b4c12a7f Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3687 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3687 for details. -gerrit

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Patch merged into coreboot/master: f0ebac8 pit: Stop calling tps65090 functions until we can call through the EC.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit f0ebac812728e928e3ca6f3d5fb3a8692c3a7206 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 02:10:36 2013 -0700 pit: Stop calling tps65090 functions until we can call through the EC. On pit, the tps65090 is connected to the EC and has to be accessed by proxy. Until we have that implemented, this change removes calls to tps69050 which will never succeed, and stops compiling in the driver. Change-Id: I7218f85f9f26623bd13aaaf8ded0638b3b2f874a Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3686 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3686 for details. -gerrit

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Patch merged into coreboot/master: 46b57bb exynos5420: Switch to fixed size types in dmc.h.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 46b57bbded9b7cdb2c5af04f5d381eb0122de2b9 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 01:37:59 2013 -0700 exynos5420: Switch to fixed size types in dmc.h. The members data structures in dmc.h are intended to have a particular size. Rather than assume that particular types are the right size, we should use types that are guaranteed to be the right size. Also, since the registers are at particular offsets as well, the structures should be packed. Change-Id: I9cc11d7451f92ba3eb85c6be88ecbc62c7a5652d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3685 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3685 for details. -gerrit

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Patch merged into coreboot/master: becb3f6 exynos5420: Revamp the high speed I2C driver.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit becb3f62f724dee34e2f3aef6d781c701c0c551b Author: Gabe Black <gabeblack(a)google.com> Date: Wed Jun 19 01:23:50 2013 -0700 exynos5420: Revamp the high speed I2C driver. The previous driver was a bit awkward and not entirely correct. This change primarily replaces the read/write functions with simpler and more robust (hopefully) version. Change-Id: I55f0ad8faec2de520e27577bd6dad9c0118d8171 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3684 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3684 for details. -gerrit

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Patch merged into coreboot/master: 3511b92 Samsung CPUs: Unify Kconfig
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 3511b92d31d645e2a77e2729e2f031d08bba98bb Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 19 12:02:47 2013 -0700 Samsung CPUs: Unify Kconfig For all other CPUs, we unconditionally include the CPU Kconfig files in the CPU directory, not in the vendor directory. Do the same thing for the Exynos CPUs. This allows us to make CPU dependent changes in the directory of that CPU alone. Also, drop some unused Kconfig variables from the Exynos Kconfig files. Change-Id: I4e4c22a0693988834e619dd33d121bf994ed57e8 Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3683 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3683 for details. -gerrit

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Patch merged into coreboot/master: 2867060 arm: Fix memory barrier usage in IO operation
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 2867060098e4023a2d33d335afe49981584ec378 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Jun 12 15:01:56 2013 -0700 arm: Fix memory barrier usage in IO operation The dmb should be executed before reading operations, and before/after writing operations. Change-Id: I572136a2f9a07eb2c38a112f5deeb2de0c0fd46c Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3682 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3682 for details. -gerrit

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coreboot-gerrit July 2013