coreboot-gerrit May 2013

coreboot-gerrit@coreboot.org

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593 discussions

Patch merged into coreboot/master: 0086162 AMD SATA: Correct »them implement« to »then implement« in comments
by gerrit＠coreboot.org 03 May '13

03 May '13

the following patch was just integrated into master: commit 008616247d4f03b47b2eb996029072a21789f3e0 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sun Apr 28 14:44:08 2013 +0200 AMD SATA: Correct »them implement« to »then implement« in comments The following command was used to correct all occurences of this typo. $ git grep -l "them implem" | xargs sed -i 's/them implem/then implem/' Change-Id: Iebd4635867d67861aaf4d4d64ca8a67e87833f38 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3145 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sun Apr 28 15:41:11 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri May 3 06:27:05 2013, giving +2 See http://review.coreboot.org/3145 for details. -gerrit

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Patch merged into coreboot/master: ac22227 Intel Lynx Point: Use 2 << 24 to clarify that I/O APIC ID is 2
by gerrit＠coreboot.org 03 May '13

03 May '13

the following patch was just integrated into master: commit ac222273701cc6d648d4362093762124662572c3 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Tue Apr 23 13:00:34 2013 +0200 Intel Lynx Point: Use 2 << 24 to clarify that I/O APIC ID is 2 Commit »haswell: Add initial support for Haswell platforms« (76c3700f) [1] used `1 << 25` to set the I/O APIC ID of 2. Instead using `2 << 24`, which is the same value, makes it clear, that the I/O APIC ID is 2. Commit »Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID is 2« (8c937c7e) [2] is used as a template. [1] http://review.coreboot.org/2616 [2] http://review.coreboot.org/3100 Change-Id: I28f9e90856157b4fdd9a1e781472cc4f51d25ece Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3123 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> Build-Tested: build bot (Jenkins) at Tue Apr 23 14:23:10 2013, giving +1 See http://review.coreboot.org/3123 for details. -gerrit

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Patch merged into coreboot/master: e62b8e9 Kconfig: Capitalize CBMEM in description of `EARLY_CBMEM_INIT`
by gerrit＠coreboot.org 03 May '13

03 May '13

the following patch was just integrated into master: commit e62b8e9a8fb08d4afd88ec57414a33b7154aaa67 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Fri Apr 26 17:15:07 2013 +0200 Kconfig: Capitalize CBMEM in description of `EARLY_CBMEM_INIT` Capitalizing CBMEM seems to be the official spelling as can be seen in the descriptions around the `EARLY_CBMEM_INIT` Kconfig option. Change-Id: I046a678c3b04ef7e681de46aa137cedc405d546f Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3143 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Fri Apr 26 18:54:26 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri May 3 06:26:19 2013, giving +2 See http://review.coreboot.org/3143 for details. -gerrit

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Patch merged into coreboot/master: e690eda cbfs: make searching for a file less verbose
by gerrit＠coreboot.org 03 May '13

03 May '13

the following patch was just integrated into master: commit e690eda978690e8c44804fe81f545a87a552685f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Apr 25 08:42:23 2013 -0500 cbfs: make searching for a file less verbose The cbfs core code would print out all unmatched file names when searching for a file. This contributes to a lot of unnecessary messages in the boot log. Change this message to a DEBUG one so that it will only be printed when CONFIG_DEBUG_CBFS is enabled. Change-Id: I1e46a4b21d80e5d2f9b511a163def7f5d4e0fb99 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/3131 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Thu May 2 02:25:33 2013, giving +1 See http://review.coreboot.org/3131 for details. -gerrit

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Patch merged into coreboot/master: 825c78b mainboard/{asus/f2a85-m, amd/thatcher}: move UDELAY_LAPIC
by gerrit＠coreboot.org 03 May '13

03 May '13

the following patch was just integrated into master: commit 825c78b5da98c7155ff6be3322cdaae0e5a060e8 Author: David Hubbard <david.c.hubbard+coreboot(a)gmail.com> Date: Thu May 2 18:06:03 2013 -0600 mainboard/{asus/f2a85-m,amd/thatcher}: move UDELAY_LAPIC Stefan Reinauer suggested 'select UDELAY_LAPIC' did not belong in f2a85-m/Kconfig. It got there via copy-paste from thatcher/Kconfig so this commit removes the 'select UDELAY_LAPIC' from both and puts it in cpu/amd/agesa/family15tn/Kconfig Since f2a85-m is the only Thatcher board coreboot supports right now, this should not break any other boards. Change-Id: I811b579c31f8d259a237d3a6724ad3b17f3a6c3e Signed-off-by: David Hubbard <david.c.hubbard+coreboot(a)gmail.com> Reviewed-on: http://review.coreboot.org/3178 Reviewed-by: Peter Stuge <peter(a)stuge.se> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Fri May 3 04:43:34 2013, giving +1 See http://review.coreboot.org/3178 for details. -gerrit

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Patch set updated for coreboot: 01fe7b4 exynos5250: monotonic timer implementation (using MCT)
by David Hendricks 03 May '13

03 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3175 -gerrit commit 01fe7b4305e6163f64f10dabd684147f95a21b45 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu May 2 13:23:08 2013 -0700 exynos5250: monotonic timer implementation (using MCT) This implements the new monotonic timer API using the global multi-core timer (MCT). Change-Id: Id56249ff5d3e0f85808f5754954c83c0bc75f1c1 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/clk.h | 2 + src/cpu/samsung/exynos5250/mct.c | 5 +-- src/cpu/samsung/exynos5250/monotonic_timer.c | 58 ++++++++++++++++++++++++++++ 3 files changed, 62 insertions(+), 3 deletions(-) diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 4785894..1894c00 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -585,4 +585,6 @@ int clock_get_mem_selection(enum ddr_mode *mem_type, unsigned *frequency_mhz, unsigned *arm_freq, enum mem_manuf *mem_manuf); +uint64_t mct_raw_value(void); + #endif diff --git a/src/cpu/samsung/exynos5250/mct.c b/src/cpu/samsung/exynos5250/mct.c index ddabbf7..4216643 100644 --- a/src/cpu/samsung/exynos5250/mct.c +++ b/src/cpu/samsung/exynos5250/mct.c @@ -88,7 +88,7 @@ static int enabled = 0; static struct mct_regs *const mct = (struct mct_regs *)MCT_ADDRESS; -static uint64_t timer_raw_value(void) +uint64_t mct_raw_value(void) { if (!enabled) { writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon); @@ -109,9 +109,8 @@ void timer_start(void) u32 timer_us(void) { - uint64_t raw = timer_raw_value(); + uint64_t raw = mct_raw_value(); static uint32_t ticks_per_microsecond = MCT_HZ/1000000; uint32_t usec = raw / ticks_per_microsecond; return usec; } - diff --git a/src/cpu/samsung/exynos5250/monotonic_timer.c b/src/cpu/samsung/exynos5250/monotonic_timer.c new file mode 100644 index 0000000..85fb208 --- /dev/null +++ b/src/cpu/samsung/exynos5250/monotonic_timer.c @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <delay.h> +#include <timer.h> +#include <time.h> /* TODO: deprecate in favor of monotonic timer stuff */ + +#include "clk.h" + +static struct monotonic_counter { + int initialized; + struct mono_time time; + uint64_t last_value; +} mono_counter; + +static const uint32_t clocks_per_usec = MCT_HZ/1000000; + +void timer_monotonic_get(struct mono_time *mt) +{ + uint64_t current_tick; + uint64_t usecs_elapsed; + + if (!mono_counter.initialized) { + init_timer(); + mono_counter.last_value = mct_raw_value(); + mono_counter.initialized = 1; + } + + current_tick = mct_raw_value(); + usecs_elapsed = (current_tick - mono_counter.last_value) / + clocks_per_usec; + + /* Update current time and tick values only if a full tick occurred. */ + if (usecs_elapsed) { + mono_time_add_usecs(&mono_counter.time, usecs_elapsed); + mono_counter.last_value = current_tick; + } + + /* Save result. */ + *mt = mono_counter.time; +}

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Patch set updated for coreboot: 27b0005 exynos5250/snow: deprecate time.h
by David Hendricks 03 May '13

03 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3177 -gerrit commit 27b00052d7a2dddbe863ad3814b2e888f074cc6b Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu May 2 16:47:54 2013 -0700 exynos5250/snow: deprecate time.h time.h We Hardly Knew Ye. This deprecates time.h which is currently only used by Exynos5250 and Snow. The original idea was to try and unify some of the various timer interfaces and has been supplanted by the monotonic timer API. timer_us() is now obsolete. timer_start() is now mct_start() and is exposed in exynos5250/clk.h. Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Change-Id: I14ebf75649d101491252c9aafea12f73ccf446b5 --- src/cpu/samsung/exynos5250/clk.h | 1 + src/cpu/samsung/exynos5250/mct.c | 12 ++---------- src/cpu/samsung/exynos5250/monotonic_timer.c | 1 - src/include/time.h | 26 -------------------------- src/mainboard/google/snow/bootblock.c | 6 +++--- src/mainboard/google/snow/romstage.c | 1 - 6 files changed, 6 insertions(+), 41 deletions(-) diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 1894c00..828e7d8 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -585,6 +585,7 @@ int clock_get_mem_selection(enum ddr_mode *mem_type, unsigned *frequency_mhz, unsigned *arm_freq, enum mem_manuf *mem_manuf); +void mct_start(void); uint64_t mct_raw_value(void); #endif diff --git a/src/cpu/samsung/exynos5250/mct.c b/src/cpu/samsung/exynos5250/mct.c index 4216643..db76e9d 100644 --- a/src/cpu/samsung/exynos5250/mct.c +++ b/src/cpu/samsung/exynos5250/mct.c @@ -22,7 +22,7 @@ #include <arch/io.h> #include <stdint.h> -#include <time.h> + #include "clk.h" struct __attribute__((packed)) mct_regs @@ -101,16 +101,8 @@ uint64_t mct_raw_value(void) return (upper << 32) | lower; } -void timer_start(void) +void mct_start(void) { writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon); enabled = 1; } - -u32 timer_us(void) -{ - uint64_t raw = mct_raw_value(); - static uint32_t ticks_per_microsecond = MCT_HZ/1000000; - uint32_t usec = raw / ticks_per_microsecond; - return usec; -} diff --git a/src/cpu/samsung/exynos5250/monotonic_timer.c b/src/cpu/samsung/exynos5250/monotonic_timer.c index 85fb208..7c6229b 100644 --- a/src/cpu/samsung/exynos5250/monotonic_timer.c +++ b/src/cpu/samsung/exynos5250/monotonic_timer.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <delay.h> #include <timer.h> -#include <time.h> /* TODO: deprecate in favor of monotonic timer stuff */ #include "clk.h" diff --git a/src/include/time.h b/src/include/time.h deleted file mode 100644 index 2cfcb35..0000000 --- a/src/include/time.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#ifndef TIME_H -#define TIME_H - -void timer_start(void); -u32 timer_us(void); - -#endif /* TIME_H */ diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 4464042..56c2650 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -21,8 +21,8 @@ #include <arch/io.h> #include <cbfs.h> #include <uart.h> -#include <time.h> #include <console/console.h> +#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/pinmux.h> #include "mainboard.h" @@ -30,10 +30,10 @@ void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { - /* kick off the microsecond timer. + /* kick off the multi-core timer. * We want to do this as early as we can. */ - timer_start(); + mct_start(); if (snow_get_wakeup_state() == SNOW_WAKEUP_DIRECT) { snow_wakeup(); diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index aa3a340..508dac6 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -36,7 +36,6 @@ #include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> #include <arch/stages.h> -#include <time.h> #include <drivers/maxim/max77686/max77686.h> #include <device/i2c.h>

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Patch set updated for coreboot: 537b894 exynos5/5250: Update timer call sites to use monotonic timer API
by David Hendricks 03 May '13

03 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3176 -gerrit commit 537b89471e2b3fd4fa83383e460492878d1f967d Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu May 2 14:23:51 2013 -0700 exynos5/5250: Update timer call sites to use monotonic timer API This goes thru various call sites where we used timer_us() and updates them to use the new monotonic timer API. Change-Id: Ie2cc86a4125cf0de12837fd7d337a11aed25715c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/exynos-fb.c | 17 ++++++++++------- src/cpu/samsung/exynos5-common/timer.c | 13 +++++++------ src/cpu/samsung/exynos5250/Makefile.inc | 3 +++ 3 files changed, 20 insertions(+), 13 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/exynos-fb.c b/src/cpu/samsung/exynos5-common/exynos-fb.c index 00ff19e..20c2dc7 100644 --- a/src/cpu/samsung/exynos5-common/exynos-fb.c +++ b/src/cpu/samsung/exynos5-common/exynos-fb.c @@ -27,7 +27,7 @@ #include <arch/io.h> #include <stdlib.h> #include <string.h> -#include <time.h> +#include <timer.h> #include <console/console.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/power.h> @@ -212,8 +212,8 @@ static int s5p_dp_config_video(struct s5p_dp_device *dp, struct video_info *video_info) { int timeout = 0; - u32 start, end; struct exynos5_dp *base = dp->base; + struct mono_time start, current, end; s5p_dp_config_video_slave_mode(dp, video_info); @@ -227,18 +227,21 @@ static int s5p_dp_config_video(struct s5p_dp_device *dp, return -ERR_PLL_NOT_UNLOCKED; } - start = timer_us(); - end = start + STREAM_ON_TIMEOUT*1000; + timer_monotonic_get(&start); + end = current = start; + mono_time_add_usecs(&end, STREAM_ON_TIMEOUT * USECS_PER_MSEC); do { if (s5p_dp_is_slave_video_stream_clock_on(dp) == 0) { timeout++; break; } - } while (timer_us() < end); + timer_monotonic_get(&current); + } while (mono_time_before(&current, &end)); + struct rela_time duration; duration = mono_time_diff(&start, &current); if (!timeout) { - printk(BIOS_ERR, "Video Clock Not ok after %uus.\n", - timer_us() - start); + printk(BIOS_ERR, "Video Clock Not ok after %ldus.\n", + rela_time_in_microseconds(&duration)); return -ERR_VIDEO_CLOCK_BAD; } diff --git a/src/cpu/samsung/exynos5-common/timer.c b/src/cpu/samsung/exynos5-common/timer.c index ca15501..8736300 100644 --- a/src/cpu/samsung/exynos5-common/timer.c +++ b/src/cpu/samsung/exynos5-common/timer.c @@ -25,7 +25,7 @@ #include <common.h> #include <arch/io.h> -#include <time.h> +#include <timer.h> #include <console/console.h> #include <cpu/samsung/exynos5-common/pwm.h> #include <cpu/samsung/exynos5-common/clk.h> @@ -121,16 +121,17 @@ unsigned long timer_get_us(void) /* delay x useconds */ void udelay(unsigned long usec) { - unsigned long start; + struct mono_time start, current; - start = timer_us(); - if ((start + usec) < start){ + timer_monotonic_get(&start); + if ((start.microseconds + usec) < start.microseconds) { printk(BIOS_EMERG, "udelay: %08lx is impossibly large\n", usec); usec = 1000000; } - while ((timer_us() - start) < usec) - ; + current = start; + while (current.microseconds < start.microseconds + usec) + timer_monotonic_get(&current); } /* diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 403c198..2cd3428 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -7,6 +7,7 @@ bootblock-y += pinmux.c mct.c power.c # Clock is required for UART bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c +bootblock-$(CONFIG_EARLY_CONSOLE) += monotonic_timer.c bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c @@ -17,6 +18,7 @@ romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c +romstage-y += monotonic_timer.c romstage-$(CONFIG_EARLY_CONSOLE) += soc.c romstage-$(CONFIG_EARLY_CONSOLE) += uart.c @@ -30,6 +32,7 @@ ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c ramstage-y += exynos5250-tmu.c ramstage-y += mct.c +ramstage-y += monotonic_timer.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c

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New patch to review for coreboot: d39a1a0 mainboard/{asus/f2a85-m, amd/thatcher}: move UDELAY_LAPIC
by David Hubbard 03 May '13

03 May '13

David Hubbard (david.c.hubbard+coreboot(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3178 -gerrit commit d39a1a0e364b32baf3ea9869d537381197ac2a6f Author: David Hubbard <david.c.hubbard+coreboot(a)gmail.com> Date: Thu May 2 18:06:03 2013 -0600 mainboard/{asus/f2a85-m,amd/thatcher}: move UDELAY_LAPIC Stefan Reinauer suggested 'select UDELAY_LAPIC' did not belong in f2a85-m/Kconfig. It got there via copy-paste from thatcher/Kconfig so this commit removes the 'select UDELAY_LAPIC' from both and puts it in cpu/amd/agesa/family15tn/Kconfig Since f2a85-m is the only Thatcher board coreboot supports right now, this should not break any other boards. Change-Id: I811b579c31f8d259a237d3a6724ad3b17f3a6c3e Signed-off-by: David Hubbard <david.c.hubbard+coreboot(a)gmail.com> --- src/cpu/amd/agesa/family15tn/Kconfig | 1 + src/mainboard/amd/thatcher/Kconfig | 1 - src/mainboard/asus/f2a85-m/Kconfig | 1 - 3 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index d2f5a8c..57045cd 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -21,6 +21,7 @@ config CPU_AMD_AGESA_FAMILY15_TN bool select PCI_IO_CFG_EXT select X86_AMD_FIXED_MTRRS + select UDELAY_LAPIC config CPU_ADDR_BITS int diff --git a/src/mainboard/amd/thatcher/Kconfig b/src/mainboard/amd/thatcher/Kconfig index 384390c..5a18e61 100644 --- a/src/mainboard/amd/thatcher/Kconfig +++ b/src/mainboard/amd/thatcher/Kconfig @@ -39,7 +39,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SUPERIO_SMSC_LPC47N217 select BOARD_ROMSIZE_KB_4096 select GFXUMA - select UDELAY_LAPIC config MAINBOARD_DIR string diff --git a/src/mainboard/asus/f2a85-m/Kconfig b/src/mainboard/asus/f2a85-m/Kconfig index e8f573e..20d79ec 100644 --- a/src/mainboard/asus/f2a85-m/Kconfig +++ b/src/mainboard/asus/f2a85-m/Kconfig @@ -40,7 +40,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SUPERIO_ITE_IT8712F select BOARD_ROMSIZE_KB_8192 select GFXUMA - select UDELAY_LAPIC choice prompt "DDR3 memory voltage"

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New patch to review for coreboot: d114db0 exynos5250/snow: deprecate time.h
by David Hendricks 03 May '13

03 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3177 -gerrit commit d114db014387933549d7660a69cedd9b1e5f092e Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu May 2 16:47:54 2013 -0700 exynos5250/snow: deprecate time.h time.h We Hardly Knew Ye. This deprecates time.h which is currently only used by Exynos5250 and Snow. The original idea was to try and unify some of the various timer interfaces and has been supplanted by the monotonic timer API. timer_us() is now obsolete. timer_start() is now mct_start() and is exposed in exynos5250/clk.h. Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Change-Id: I14ebf75649d101491252c9aafea12f73ccf446b5 --- src/cpu/samsung/exynos5250/clk.h | 1 + src/cpu/samsung/exynos5250/mct.c | 12 ++---------- src/cpu/samsung/exynos5250/monotonic_timer.c | 1 - src/include/time.h | 26 -------------------------- src/mainboard/google/snow/bootblock.c | 6 +++--- src/mainboard/google/snow/romstage.c | 1 - 6 files changed, 6 insertions(+), 41 deletions(-) diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 1894c00..828e7d8 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -585,6 +585,7 @@ int clock_get_mem_selection(enum ddr_mode *mem_type, unsigned *frequency_mhz, unsigned *arm_freq, enum mem_manuf *mem_manuf); +void mct_start(void); uint64_t mct_raw_value(void); #endif diff --git a/src/cpu/samsung/exynos5250/mct.c b/src/cpu/samsung/exynos5250/mct.c index 4216643..db76e9d 100644 --- a/src/cpu/samsung/exynos5250/mct.c +++ b/src/cpu/samsung/exynos5250/mct.c @@ -22,7 +22,7 @@ #include <arch/io.h> #include <stdint.h> -#include <time.h> + #include "clk.h" struct __attribute__((packed)) mct_regs @@ -101,16 +101,8 @@ uint64_t mct_raw_value(void) return (upper << 32) | lower; } -void timer_start(void) +void mct_start(void) { writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon); enabled = 1; } - -u32 timer_us(void) -{ - uint64_t raw = mct_raw_value(); - static uint32_t ticks_per_microsecond = MCT_HZ/1000000; - uint32_t usec = raw / ticks_per_microsecond; - return usec; -} diff --git a/src/cpu/samsung/exynos5250/monotonic_timer.c b/src/cpu/samsung/exynos5250/monotonic_timer.c index f0444ce..1cda132 100644 --- a/src/cpu/samsung/exynos5250/monotonic_timer.c +++ b/src/cpu/samsung/exynos5250/monotonic_timer.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <delay.h> #include <timer.h> -#include <time.h> /* TODO: deprecate in favor of monotonic timer stuff */ #include "clk.h" diff --git a/src/include/time.h b/src/include/time.h deleted file mode 100644 index 2cfcb35..0000000 --- a/src/include/time.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#ifndef TIME_H -#define TIME_H - -void timer_start(void); -u32 timer_us(void); - -#endif /* TIME_H */ diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 4464042..56c2650 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -21,8 +21,8 @@ #include <arch/io.h> #include <cbfs.h> #include <uart.h> -#include <time.h> #include <console/console.h> +#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/pinmux.h> #include "mainboard.h" @@ -30,10 +30,10 @@ void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { - /* kick off the microsecond timer. + /* kick off the multi-core timer. * We want to do this as early as we can. */ - timer_start(); + mct_start(); if (snow_get_wakeup_state() == SNOW_WAKEUP_DIRECT) { snow_wakeup(); diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index aa3a340..508dac6 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -36,7 +36,6 @@ #include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> #include <arch/stages.h> -#include <time.h> #include <drivers/maxim/max77686/max77686.h> #include <device/i2c.h>

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coreboot-gerrit May 2013