coreboot-gerrit March 2013

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New patch to review for coreboot: 7bdc84c ARMv7: Drop XIP relocation code for romstage
by Stefan Reinauer 26 Mar '13

26 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2912 -gerrit commit 7bdc84c31b686eb55cf648ada9f835987b1c5ccc Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Mar 25 17:50:17 2013 -0700 ARMv7: Drop XIP relocation code for romstage It was never used, because we pushed romstage_null into the CBFS instead of romstage_xip. It's not surprising this worked, but it was a crude hack. Get rid of all the intermediate objects that are not needed. This could probably be further simplified to use the default cbfs mechanism in our build system instead of having a specific rule for romstage, but that's for another day. Change-Id: I492ca2015ec81e13499fcd8dd331371f46a31c78 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/armv7/Makefile.inc | 34 ++++++---------------------------- 1 file changed, 6 insertions(+), 28 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 1ab0184..7873e61 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -193,11 +193,11 @@ endif ################################################################################ # Build the final rom image -$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL) +$(obj)/coreboot.pre: $(objcbfs)/romstage.elf $(obj)/coreboot.pre1 $(CBFSTOOL) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre1 $@.tmp $(CBFSTOOL) $@.tmp add-stage \ - -f $(objcbfs)/romstage_null.debug \ + -f $(objcbfs)/romstage.elf \ -n $(CONFIG_CBFS_PREFIX)/romstage -c none mv $@.tmp $@ @@ -249,43 +249,21 @@ endif ################################################################################ # Build the romstage -$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage_null.ld +$(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_null.ld + $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group endif -$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld - @printf " LINK $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) $(stages_o) -T $(objgenerated)/romstage_xip.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - -$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions +$(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions @printf " GEN $(subst $(obj)/,,$(@))\n" rm -f $@ printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp mv $@.tmp $@ -$(objgenerated)/romstage_xip.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt - @printf " GEN $(subst $(obj)/,,$(@))\n" - rm -f $@ - sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(objcbfs)/base_xip.txt > $@.tmp - sed -e '/ROMSTAGE_BASE/d' $(objgenerated)/romstage_null.ld >> $@.tmp - mv $@.tmp $@ - -$(objcbfs)/base_xip.txt: $(obj)/coreboot.pre1 $(objcbfs)/romstage_null.bin - @printf " generating base_xip.txt\n" - rm -f $@ - $(CBFSTOOL) $(obj)/coreboot.pre1 locate -f $(objcbfs)/romstage_null.bin -n $(CONFIG_CBFS_PREFIX)/romstage -P $(CONFIG_XIP_ROM_SIZE) > $@.tmp \ - || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; } - mv $@.tmp $@ - $(objgenerated)/crt0.romstage.S: $$(crt0s) @printf " GEN $(subst $(obj)/,,$(@))\n" printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@

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Patch merged into coreboot/master: 9427ca1 samsung/exynos5: add resource functions for the display port
by gerrit＠coreboot.org 26 Mar '13

26 Mar '13

the following patch was just integrated into master: commit 9427ca151e44644238b1b52138894195a9f5175f Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Mon Mar 18 09:49:54 2013 -0700 samsung/exynos5: add resource functions for the display port This does NOT turn on the graphics. The device tree has been changed enough so that, at the very least, the correct functions are called at the correct time, with the correct paramaters. We decided to yank the I2C entries as they did not obvious function and might not even have been correct. Not working, seemingly, but we need to add a 4M resource for memory, and it seems it needs to be fixed at the address shown. This address was chosen from current hardware. We realized that the display code should be part of the cpu -- that's how the hardware works! Change-Id: Ied65a554f833566be817540702f79a02e7b6cb6e Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2615 Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Tue Mar 26 01:42:07 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Tue Mar 26 00:42:23 2013, giving +2 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Tue Mar 26 00:20:52 2013, giving +2 See http://review.coreboot.org/2615 for details. -gerrit

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Patch set updated for coreboot: 2401031 samsung/exynos5: add resource functions for the display port
by Ronald G. Minnich 26 Mar '13

26 Mar '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2615 -gerrit commit 240103196991f627e8169f214706e4a1256192e2 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Mon Mar 18 09:49:54 2013 -0700 samsung/exynos5: add resource functions for the display port This does NOT turn on the graphics. The device tree has been changed enough so that, at the very least, the correct functions are called at the correct time, with the correct paramaters. We decided to yank the I2C entries as they did not obvious function and might not even have been correct. Not working, seemingly, but we need to add a 4M resource for memory, and it seems it needs to be fixed at the address shown. This address was chosen from current hardware. We realized that the display code should be part of the cpu -- that's how the hardware works! Change-Id: Ied65a554f833566be817540702f79a02e7b6cb6e Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/cpu/samsung/exynos5-common/displayport/Kconfig | 2 - .../exynos5-common/displayport/Makefile.inc | 2 - src/cpu/samsung/exynos5-common/displayport/chip.h | 40 -------- .../exynos5-common/displayport/displayport.c | 107 --------------------- src/cpu/samsung/exynos5-common/exynos-fb.c | 4 +- src/cpu/samsung/exynos5250/chip.h | 40 ++++++++ src/cpu/samsung/exynos5250/cpu.c | 84 +++++++++++++++- src/mainboard/google/snow/devicetree.cb | 38 +++----- 8 files changed, 138 insertions(+), 179 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/displayport/Kconfig b/src/cpu/samsung/exynos5-common/displayport/Kconfig deleted file mode 100644 index 26d1422..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config EXYNOS_DISPLAYPORT - bool diff --git a/src/cpu/samsung/exynos5-common/displayport/Makefile.inc b/src/cpu/samsung/exynos5-common/displayport/Makefile.inc deleted file mode 100644 index 7c52eaf..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -ramstage-$(CONFIG_EXYNOS_DISPLAYPORT) += displayport.c - diff --git a/src/cpu/samsung/exynos5-common/displayport/chip.h b/src/cpu/samsung/exynos5-common/displayport/chip.h deleted file mode 100644 index 53b7836..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/chip.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef CPU_SAMSUNG_EXYNOS5_COMMON_DISPLAYPORT_H -#define CPU_SAMSUNG_EXYNOS5_COMMON_DISPLAYPORT_H - -struct cpu_samsung_exynos5_common_displayport_config { - /* special magic numbers! */ - int clkval_f; - int upper_margin; - int lower_margin; - int vsync; - int left_margin; - int right_margin; - int hsync; - - int xres; - int yres; - int bpp; - - u32 lcdbase; -}; - -#endif /* CPU_SAMSUNG_EXYNOS5-COMMON_DISPLAYPORT_H */ diff --git a/src/cpu/samsung/exynos5-common/displayport/displayport.c b/src/cpu/samsung/exynos5-common/displayport/displayport.c deleted file mode 100644 index 1c08bc7..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/displayport.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdlib.h> -#include <string.h> -#include <delay.h> -#include <arch/io.h> -#include <device/device.h> - -/* we distinguish a display port device from a raw graphics device because there are - * dramatic differences in startup depending on graphics usage. To make startup fast - * and easier to understand and debug we explicitly name this common case. The alternate - * approach, involving lots of machine and callbacks, is hard to debug and verify. - */ -static void exynos_displayport_init(void) -{ - struct cpu_samsung_exynos5_common_displayport_config *conf = dev->chip_info; - /* put these on the stack. If, at some point, we want to move this code to a - * pre-ram stage, it will be much easier. - */ - vidinfo_t vi; - struct exynos5_fimd_panel panel; - void *lcdbase; - - memset(vi, 0, sizeof(vi)); - memset(panel, 0, sizeof(panel)); - - panel.is_dp = 1; /* Display I/F is eDP */ - /* while it is true that we did a memset to zero, - * we leave some 'set to zero' entries here to make - * it clear what's going on. Graphics is confusing. - */ - panel.is_mipi = 0; - panel.fixvclk = 0; - panel.ivclk = 0; - panel.clkval_f = conf->clkval_f; - panel.upper_margin = conf->upper_margin; - panel.lower_margin = conf->lower_margin; - panel.vsync = conf->vsync; - panel.left_margin = conf->left_margin; - panel.right_margin = conf->right_margin; - panel.hsync = conf->hsync; - - vi->vl_col = conf->xres; - vi->fl_row = conf->yres; - vi->vl_bpix = conf->bpp; - vi->cmap = cbmem_reserve(64*1024); /* The size is a magic number from hardware. */ - - lcdbase = conf->lcdbase; - printk(BIOS_DEBUG, "Initializing exynos VGA\n"); - ret = lcd_ctrl_init(&vi, &panel, lcdbase); -#if 0 - ret = board_dp_lcd_vdd(blob, &wait_ms); - ret = board_dp_bridge_setup(blob, &wait_ms); - while (tries < 5) { - ret = board_dp_bridge_init(blob, &wait_ms); - ret = board_dp_hotplug(blob, &wait_ms); - if (ret) { - ret = board_dp_bridge_reset(blob, &wait_ms); - continue; - } - ret = dp_controller_init(blob, &wait_ms); - ret = board_dp_backlight_vdd(blob, &wait_ms); - ret = board_dp_backlight_pwm(blob, &wait_ms); - ret = board_dp_backlight_en(blob, &wait_ms); - } -#endif -} - -static void exynos_displayport_noop(device_t dummy) -{ -} - -static struct device_operations exynos_displayport_operations = { - .read_resources = exynos_displayport_noop, - .set_resources = exynos_displayport_noop, - .enable_resources = exynos_displayport_noop, - .init = exynos_displayport_init, - .scan_bus = exynos_displayport_noop, -}; - -static void exynos_displayport_enable(struct device *dev) -{ - if (dev->link_list != NULL) - dev->ops = &exynos_displayport_operations; -} - -struct chip_operations drivers_i2c_exynos_displayport_ops = { - CHIP_NAME("exynos displayport") - .enable_dev = exynos_displayport_enable; -}; diff --git a/src/cpu/samsung/exynos5-common/exynos-fb.c b/src/cpu/samsung/exynos5-common/exynos-fb.c index 30d0767..990a313 100644 --- a/src/cpu/samsung/exynos5-common/exynos-fb.c +++ b/src/cpu/samsung/exynos5-common/exynos-fb.c @@ -100,7 +100,7 @@ static void fimd_bypass(void) { struct exynos5_sysreg *sysreg = samsung_get_base_sysreg(); - /*setbits_le32(&sysreg->disp1blk_cfg, FIMDBYPASS_DISP1);*/ + setbits_le32(&sysreg->disp1blk_cfg, FIMDBYPASS_DISP1); sysreg->disp1blk_cfg &= ~FIMDBYPASS_DISP1; } @@ -586,7 +586,9 @@ int lcd_ctrl_init(vidinfo_t *panel_info, struct exynos5_fimd_panel *panel_data, //vi->yres = panel_info->vl_row; fimd_bypass(); + printk(BIOS_SPEW, "fimd_bypass\n"); fb_init(panel_info, lcdbase, panel_data); + printk(BIOS_SPEW, "fb_init(%p, %p, %p\n",panel_info, lcdbase, panel_data); /* Enable flushing after LCD writes if requested */ // forget it. lcd_set_flush_dcache(1); diff --git a/src/cpu/samsung/exynos5250/chip.h b/src/cpu/samsung/exynos5250/chip.h new file mode 100644 index 0000000..798cd26 --- /dev/null +++ b/src/cpu/samsung/exynos5250/chip.h @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_SAMSUNG_EXYNOS5250_H +#define CPU_SAMSUNG_EXYNOS5250_H + +struct cpu_samsung_exynos5250_config { + /* special magic numbers! */ + int clkval_f; + int upper_margin; + int lower_margin; + int vsync; + int left_margin; + int right_margin; + int hsync; + + int xres; + int yres; + int bpp; + + u32 lcdbase; +}; + +#endif /* CPU_SAMSUNG_EXYNOS5250_H */ diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c index bcf4d22..114d691 100644 --- a/src/cpu/samsung/exynos5250/cpu.c +++ b/src/cpu/samsung/exynos5250/cpu.c @@ -1,5 +1,14 @@ +#include <stdlib.h> +#include <string.h> +#include <stddef.h> +#include <delay.h> #include <console/console.h> +#include <arch/io.h> #include <device/device.h> +#include <cbmem.h> +#include <cpu/samsung/exynos5250/fimd.h> +#include <cpu/samsung/exynos5-common/s5p-dp-core.h> +#include "chip.h" #define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10) #define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL) @@ -28,8 +37,76 @@ static struct device_operations domain_ops = { .scan_bus = domain_scan_bus, }; +/* we distinguish a display port device from a raw graphics device because there are + * dramatic differences in startup depending on graphics usage. To make startup fast + * and easier to understand and debug we explicitly name this common case. The alternate + * approach, involving lots of machine and callbacks, is hard to debug and verify. + */ +static void exynos_displayport_init(device_t dev) +{ + int ret; + struct cpu_samsung_exynos5250_config *conf = dev->chip_info; + /* put these on the stack. If, at some point, we want to move this code to a + * pre-ram stage, it will be much easier. + */ + vidinfo_t vi; + struct exynos5_fimd_panel panel; + u32 lcdbase; + + printk(BIOS_SPEW, "%s: dev %p, conf %p\n", __func__, dev, conf); + memset(&vi, 0, sizeof(vi)); + memset(&panel, 0, sizeof(panel)); + + panel.is_dp = 1; /* Display I/F is eDP */ + /* while it is true that we did a memset to zero, + * we leave some 'set to zero' entries here to make + * it clear what's going on. Graphics is confusing. + */ + panel.is_mipi = 0; + panel.fixvclk = 0; + panel.ivclk = 0; + panel.clkval_f = conf->clkval_f; + panel.upper_margin = conf->upper_margin; + panel.lower_margin = conf->lower_margin; + panel.vsync = conf->vsync; + panel.left_margin = conf->left_margin; + panel.right_margin = conf->right_margin; + panel.hsync = conf->hsync; + + vi.vl_col = conf->xres; + vi.vl_row = conf->yres; + vi.vl_bpix = conf->bpp; + printk(BIOS_SPEW, "lcd base is %p\n", (void *)(conf->lcdbase)); + /* The size is a magic number from hardware. */ + mmio_resource(dev, 0, conf->lcdbase/KiB, 64); + vi.cmap = (void *)conf->lcdbase; + lcdbase = conf->lcdbase + 64*KiB; + + mmio_resource(dev, 1, lcdbase, (conf->xres*conf->yres*4 + (KiB-1))/KiB); + printk(BIOS_DEBUG, "Initializing exynos VGA, base %p\n",(void *)lcdbase); + ret = lcd_ctrl_init(&vi, &panel, (void *)lcdbase); +#if 0 + ret = board_dp_lcd_vdd(blob, &wait_ms); + ret = board_dp_bridge_setup(blob, &wait_ms); + while (tries < 5) { + ret = board_dp_bridge_init(blob, &wait_ms); + ret = board_dp_hotplug(blob, &wait_ms); + if (ret) { + ret = board_dp_bridge_reset(blob, &wait_ms); + continue; + } + ret = dp_controller_init(blob, &wait_ms); + ret = board_dp_backlight_vdd(blob, &wait_ms); + ret = board_dp_backlight_pwm(blob, &wait_ms); + ret = board_dp_backlight_en(blob, &wait_ms); + } +#endif +} + static void cpu_init(device_t dev) { + printk(BIOS_SPEW, "%s\n", __func__); + exynos_displayport_init(dev); } static void cpu_noop(device_t dev) @@ -44,17 +121,20 @@ static struct device_operations cpu_ops = { .scan_bus = 0, }; -static void enable_dev(device_t dev) +static void enable_exynos5250_dev(device_t dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { + printk(BIOS_SPEW, "%s: DOMAIN\n", __func__); dev->ops = &domain_ops; } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + printk(BIOS_SPEW, "%s: CPU_CLUSTER\n", __func__); dev->ops = &cpu_ops; } + printk(BIOS_SPEW, "%s: done\n", __func__); } struct chip_operations cpu_samsung_exynos5250_ops = { CHIP_NAME("CPU Samsung Exynos 5250") - .enable_dev = enable_dev, + .enable_dev = enable_exynos5250_dev, }; diff --git a/src/mainboard/google/snow/devicetree.cb b/src/mainboard/google/snow/devicetree.cb index 5ad786e..cfe5cf1 100644 --- a/src/mainboard/google/snow/devicetree.cb +++ b/src/mainboard/google/snow/devicetree.cb @@ -17,30 +17,18 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# FIXME: this is just a stub for now chip cpu/samsung/exynos5250 - -device cpu_cluster 0 on -end - -device domain 0 on - chip drivers/generic/generic # I2C0 controller - device i2c 6 on end # ? - device i2c 9 on end # ? - end - chip cpu/samsung/exynos5-common/displayport - register "xres" = "1366" - register "yres" = "768" - register "bpp" = "16" - # complex magic timing! - register "clkval_f" = "2" - register "upper_margin" = "14" - register "lower_margin" = "3" - register "vsync" = "5" - register "left_margin" = "80" - register "right_margin" = "48" - register "hsync" = "32" - register "lcdbase" = "0x10000000" - end -end + device cpu_cluster 0 on end + register "xres" = "1366" + register "yres" = "768" + register "bpp" = "16" + # complex magic timing! + register "clkval_f" = "2" + register "upper_margin" = "14" + register "lower_margin" = "3" + register "vsync" = "5" + register "left_margin" = "80" + register "right_margin" = "48" + register "hsync" = "32" + register "lcdbase" = "0x50000000" end

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Patch merged into coreboot/master: f9be756 armv7: add new dcache and MMU setup functions
by gerrit＠coreboot.org 26 Mar '13

26 Mar '13

the following patch was just integrated into master: commit f9be756b559ccc567e5412c85b5ded98f19617e7 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Mar 21 21:58:50 2013 -0700 armv7: add new dcache and MMU setup functions This adds new MMU setup code. Most notably, this version uses cbmem_add() to determine the translation table base address, which in turn is necessary to ensure payloads which wipe memory can tell which regions to wipe out. TODOs: - Finish cleaning up references to old cache/MMU stuff - Add L2 setup (from exynos_cache.c) - Set up ranges dynamically rather than in ramstage's main(). Change-Id: Iba5295a801e8058a3694e4ec5b94bbe9a69d3ee6 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2877 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Mon Mar 25 22:52:16 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Tue Mar 26 00:05:21 2013, giving +2 See http://review.coreboot.org/2877 for details. -gerrit

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Patch set updated for coreboot: a4f7390 samsung/exynos5: add resource functions for the display port
by Ronald G. Minnich 26 Mar '13

26 Mar '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2615 -gerrit commit a4f739013b870b42d9bfa6607df019ba66bb1999 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Mon Mar 18 09:49:54 2013 -0700 samsung/exynos5: add resource functions for the display port This does NOT turn on the graphics. The device tree has been changed enough so that, at the very least, the correct functions are called at the correct time, with the correct paramaters. We decided to yank the I2C entries as they did not obvious function and might not even have been correct. Not working, seemingly, but we need to add a 4M resource for memory, and it seems it needs to be fixed at the address shown. This address was chosen from current hardware. We realized that the display code should be part of the cpu -- that's how the hardware works! Change-Id: Ied65a554f833566be817540702f79a02e7b6cb6e Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/cpu/samsung/exynos5-common/displayport/Kconfig | 2 - .../exynos5-common/displayport/Makefile.inc | 2 - src/cpu/samsung/exynos5-common/displayport/chip.h | 40 -------- .../exynos5-common/displayport/displayport.c | 107 --------------------- src/cpu/samsung/exynos5-common/exynos-fb.c | 4 +- src/cpu/samsung/exynos5250/chip.h | 40 ++++++++ src/cpu/samsung/exynos5250/cpu.c | 84 +++++++++++++++- src/mainboard/google/snow/devicetree.cb | 17 +--- 8 files changed, 128 insertions(+), 168 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/displayport/Kconfig b/src/cpu/samsung/exynos5-common/displayport/Kconfig deleted file mode 100644 index 26d1422..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config EXYNOS_DISPLAYPORT - bool diff --git a/src/cpu/samsung/exynos5-common/displayport/Makefile.inc b/src/cpu/samsung/exynos5-common/displayport/Makefile.inc deleted file mode 100644 index 7c52eaf..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -ramstage-$(CONFIG_EXYNOS_DISPLAYPORT) += displayport.c - diff --git a/src/cpu/samsung/exynos5-common/displayport/chip.h b/src/cpu/samsung/exynos5-common/displayport/chip.h deleted file mode 100644 index 53b7836..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/chip.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef CPU_SAMSUNG_EXYNOS5_COMMON_DISPLAYPORT_H -#define CPU_SAMSUNG_EXYNOS5_COMMON_DISPLAYPORT_H - -struct cpu_samsung_exynos5_common_displayport_config { - /* special magic numbers! */ - int clkval_f; - int upper_margin; - int lower_margin; - int vsync; - int left_margin; - int right_margin; - int hsync; - - int xres; - int yres; - int bpp; - - u32 lcdbase; -}; - -#endif /* CPU_SAMSUNG_EXYNOS5-COMMON_DISPLAYPORT_H */ diff --git a/src/cpu/samsung/exynos5-common/displayport/displayport.c b/src/cpu/samsung/exynos5-common/displayport/displayport.c deleted file mode 100644 index 1c08bc7..0000000 --- a/src/cpu/samsung/exynos5-common/displayport/displayport.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdlib.h> -#include <string.h> -#include <delay.h> -#include <arch/io.h> -#include <device/device.h> - -/* we distinguish a display port device from a raw graphics device because there are - * dramatic differences in startup depending on graphics usage. To make startup fast - * and easier to understand and debug we explicitly name this common case. The alternate - * approach, involving lots of machine and callbacks, is hard to debug and verify. - */ -static void exynos_displayport_init(void) -{ - struct cpu_samsung_exynos5_common_displayport_config *conf = dev->chip_info; - /* put these on the stack. If, at some point, we want to move this code to a - * pre-ram stage, it will be much easier. - */ - vidinfo_t vi; - struct exynos5_fimd_panel panel; - void *lcdbase; - - memset(vi, 0, sizeof(vi)); - memset(panel, 0, sizeof(panel)); - - panel.is_dp = 1; /* Display I/F is eDP */ - /* while it is true that we did a memset to zero, - * we leave some 'set to zero' entries here to make - * it clear what's going on. Graphics is confusing. - */ - panel.is_mipi = 0; - panel.fixvclk = 0; - panel.ivclk = 0; - panel.clkval_f = conf->clkval_f; - panel.upper_margin = conf->upper_margin; - panel.lower_margin = conf->lower_margin; - panel.vsync = conf->vsync; - panel.left_margin = conf->left_margin; - panel.right_margin = conf->right_margin; - panel.hsync = conf->hsync; - - vi->vl_col = conf->xres; - vi->fl_row = conf->yres; - vi->vl_bpix = conf->bpp; - vi->cmap = cbmem_reserve(64*1024); /* The size is a magic number from hardware. */ - - lcdbase = conf->lcdbase; - printk(BIOS_DEBUG, "Initializing exynos VGA\n"); - ret = lcd_ctrl_init(&vi, &panel, lcdbase); -#if 0 - ret = board_dp_lcd_vdd(blob, &wait_ms); - ret = board_dp_bridge_setup(blob, &wait_ms); - while (tries < 5) { - ret = board_dp_bridge_init(blob, &wait_ms); - ret = board_dp_hotplug(blob, &wait_ms); - if (ret) { - ret = board_dp_bridge_reset(blob, &wait_ms); - continue; - } - ret = dp_controller_init(blob, &wait_ms); - ret = board_dp_backlight_vdd(blob, &wait_ms); - ret = board_dp_backlight_pwm(blob, &wait_ms); - ret = board_dp_backlight_en(blob, &wait_ms); - } -#endif -} - -static void exynos_displayport_noop(device_t dummy) -{ -} - -static struct device_operations exynos_displayport_operations = { - .read_resources = exynos_displayport_noop, - .set_resources = exynos_displayport_noop, - .enable_resources = exynos_displayport_noop, - .init = exynos_displayport_init, - .scan_bus = exynos_displayport_noop, -}; - -static void exynos_displayport_enable(struct device *dev) -{ - if (dev->link_list != NULL) - dev->ops = &exynos_displayport_operations; -} - -struct chip_operations drivers_i2c_exynos_displayport_ops = { - CHIP_NAME("exynos displayport") - .enable_dev = exynos_displayport_enable; -}; diff --git a/src/cpu/samsung/exynos5-common/exynos-fb.c b/src/cpu/samsung/exynos5-common/exynos-fb.c index 30d0767..990a313 100644 --- a/src/cpu/samsung/exynos5-common/exynos-fb.c +++ b/src/cpu/samsung/exynos5-common/exynos-fb.c @@ -100,7 +100,7 @@ static void fimd_bypass(void) { struct exynos5_sysreg *sysreg = samsung_get_base_sysreg(); - /*setbits_le32(&sysreg->disp1blk_cfg, FIMDBYPASS_DISP1);*/ + setbits_le32(&sysreg->disp1blk_cfg, FIMDBYPASS_DISP1); sysreg->disp1blk_cfg &= ~FIMDBYPASS_DISP1; } @@ -586,7 +586,9 @@ int lcd_ctrl_init(vidinfo_t *panel_info, struct exynos5_fimd_panel *panel_data, //vi->yres = panel_info->vl_row; fimd_bypass(); + printk(BIOS_SPEW, "fimd_bypass\n"); fb_init(panel_info, lcdbase, panel_data); + printk(BIOS_SPEW, "fb_init(%p, %p, %p\n",panel_info, lcdbase, panel_data); /* Enable flushing after LCD writes if requested */ // forget it. lcd_set_flush_dcache(1); diff --git a/src/cpu/samsung/exynos5250/chip.h b/src/cpu/samsung/exynos5250/chip.h new file mode 100644 index 0000000..798cd26 --- /dev/null +++ b/src/cpu/samsung/exynos5250/chip.h @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_SAMSUNG_EXYNOS5250_H +#define CPU_SAMSUNG_EXYNOS5250_H + +struct cpu_samsung_exynos5250_config { + /* special magic numbers! */ + int clkval_f; + int upper_margin; + int lower_margin; + int vsync; + int left_margin; + int right_margin; + int hsync; + + int xres; + int yres; + int bpp; + + u32 lcdbase; +}; + +#endif /* CPU_SAMSUNG_EXYNOS5250_H */ diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c index bcf4d22..114d691 100644 --- a/src/cpu/samsung/exynos5250/cpu.c +++ b/src/cpu/samsung/exynos5250/cpu.c @@ -1,5 +1,14 @@ +#include <stdlib.h> +#include <string.h> +#include <stddef.h> +#include <delay.h> #include <console/console.h> +#include <arch/io.h> #include <device/device.h> +#include <cbmem.h> +#include <cpu/samsung/exynos5250/fimd.h> +#include <cpu/samsung/exynos5-common/s5p-dp-core.h> +#include "chip.h" #define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10) #define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL) @@ -28,8 +37,76 @@ static struct device_operations domain_ops = { .scan_bus = domain_scan_bus, }; +/* we distinguish a display port device from a raw graphics device because there are + * dramatic differences in startup depending on graphics usage. To make startup fast + * and easier to understand and debug we explicitly name this common case. The alternate + * approach, involving lots of machine and callbacks, is hard to debug and verify. + */ +static void exynos_displayport_init(device_t dev) +{ + int ret; + struct cpu_samsung_exynos5250_config *conf = dev->chip_info; + /* put these on the stack. If, at some point, we want to move this code to a + * pre-ram stage, it will be much easier. + */ + vidinfo_t vi; + struct exynos5_fimd_panel panel; + u32 lcdbase; + + printk(BIOS_SPEW, "%s: dev %p, conf %p\n", __func__, dev, conf); + memset(&vi, 0, sizeof(vi)); + memset(&panel, 0, sizeof(panel)); + + panel.is_dp = 1; /* Display I/F is eDP */ + /* while it is true that we did a memset to zero, + * we leave some 'set to zero' entries here to make + * it clear what's going on. Graphics is confusing. + */ + panel.is_mipi = 0; + panel.fixvclk = 0; + panel.ivclk = 0; + panel.clkval_f = conf->clkval_f; + panel.upper_margin = conf->upper_margin; + panel.lower_margin = conf->lower_margin; + panel.vsync = conf->vsync; + panel.left_margin = conf->left_margin; + panel.right_margin = conf->right_margin; + panel.hsync = conf->hsync; + + vi.vl_col = conf->xres; + vi.vl_row = conf->yres; + vi.vl_bpix = conf->bpp; + printk(BIOS_SPEW, "lcd base is %p\n", (void *)(conf->lcdbase)); + /* The size is a magic number from hardware. */ + mmio_resource(dev, 0, conf->lcdbase/KiB, 64); + vi.cmap = (void *)conf->lcdbase; + lcdbase = conf->lcdbase + 64*KiB; + + mmio_resource(dev, 1, lcdbase, (conf->xres*conf->yres*4 + (KiB-1))/KiB); + printk(BIOS_DEBUG, "Initializing exynos VGA, base %p\n",(void *)lcdbase); + ret = lcd_ctrl_init(&vi, &panel, (void *)lcdbase); +#if 0 + ret = board_dp_lcd_vdd(blob, &wait_ms); + ret = board_dp_bridge_setup(blob, &wait_ms); + while (tries < 5) { + ret = board_dp_bridge_init(blob, &wait_ms); + ret = board_dp_hotplug(blob, &wait_ms); + if (ret) { + ret = board_dp_bridge_reset(blob, &wait_ms); + continue; + } + ret = dp_controller_init(blob, &wait_ms); + ret = board_dp_backlight_vdd(blob, &wait_ms); + ret = board_dp_backlight_pwm(blob, &wait_ms); + ret = board_dp_backlight_en(blob, &wait_ms); + } +#endif +} + static void cpu_init(device_t dev) { + printk(BIOS_SPEW, "%s\n", __func__); + exynos_displayport_init(dev); } static void cpu_noop(device_t dev) @@ -44,17 +121,20 @@ static struct device_operations cpu_ops = { .scan_bus = 0, }; -static void enable_dev(device_t dev) +static void enable_exynos5250_dev(device_t dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { + printk(BIOS_SPEW, "%s: DOMAIN\n", __func__); dev->ops = &domain_ops; } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + printk(BIOS_SPEW, "%s: CPU_CLUSTER\n", __func__); dev->ops = &cpu_ops; } + printk(BIOS_SPEW, "%s: done\n", __func__); } struct chip_operations cpu_samsung_exynos5250_ops = { CHIP_NAME("CPU Samsung Exynos 5250") - .enable_dev = enable_dev, + .enable_dev = enable_exynos5250_dev, }; diff --git a/src/mainboard/google/snow/devicetree.cb b/src/mainboard/google/snow/devicetree.cb index 5ad786e..e8da851 100644 --- a/src/mainboard/google/snow/devicetree.cb +++ b/src/mainboard/google/snow/devicetree.cb @@ -17,18 +17,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# FIXME: this is just a stub for now chip cpu/samsung/exynos5250 - -device cpu_cluster 0 on -end - -device domain 0 on - chip drivers/generic/generic # I2C0 controller - device i2c 6 on end # ? - device i2c 9 on end # ? - end - chip cpu/samsung/exynos5-common/displayport + device cpu_cluster 0 on end register "xres" = "1366" register "yres" = "768" register "bpp" = "16" @@ -40,7 +30,6 @@ device domain 0 on register "left_margin" = "80" register "right_margin" = "48" register "hsync" = "32" - register "lcdbase" = "0x10000000" - end -end + register "lcdbase" = "0x50000000" + end

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New patch to review for coreboot: 60e2f7d libpayload: Fix unused function warning in EHCI stack
by Stefan Reinauer 25 Mar '13

25 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2909 -gerrit commit 60e2f7d8e517eb1a3553754ba99434e287d271fa Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Mar 25 15:56:08 2013 -0700 libpayload: Fix unused function warning in EHCI stack The function dump_qh() was added a while back but never used. Hide it behind USB_DEBUG so it doesn't cause warnings when not debugging the USB stack. Change-Id: Idb3c7bb214895ef82676d181836a578bf161e8e0 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- payloads/libpayload/drivers/usb/ehci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c index 3e5de1d..5af99e0 100644 --- a/payloads/libpayload/drivers/usb/ehci.c +++ b/payloads/libpayload/drivers/usb/ehci.c @@ -27,6 +27,8 @@ * SUCH DAMAGE. */ +//#define USB_DEBUG + #include <libpayload.h> #include "ehci.h" #include "ehci_private.h" @@ -67,6 +69,7 @@ static void dump_td(u32 addr) usb_debug("+---------------------------------------------------+\n"); } +#ifdef USB_DEBUG static void dump_qh(ehci_qh_t *cur) { qtd_t *tmp_qtd = NULL; @@ -112,6 +115,7 @@ static void dump_qh(ehci_qh_t *cur) usb_debug("+---------------------------------------------------+\n"); } } +#endif static void ehci_start (hci_t *controller) {

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New patch to review for coreboot: 758f8d1 libpayload: Fix prototype warnings in PDCurses
by Stefan Reinauer 25 Mar '13

25 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2908 -gerrit commit 758f8d14be750caa12c85c85c0eccf98373e1b4c Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Mar 25 15:38:21 2013 -0700 libpayload: Fix prototype warnings in PDCurses This fixes the following PDCurses warnings: CC curses/pdcurses-backend/pdcsetsc.libcurses.o curses/pdcurses-backend/pdcsetsc.c: In function 'PDC_curs_set': curses/pdcurses-backend/pdcsetsc.c:17:9: warning: implicit declaration of function 'serial_cursor_enable' [-Wimplicit-function-declaration] curses/pdcurses-backend/pdcsetsc.c:22:9: warning: implicit declaration of function 'video_console_cursor_enable' [-Wimplicit-function-declaration] CC curses/pdcurses-backend/pdcutil.libcurses.o curses/pdcurses-backend/pdcutil.c:30:6: warning: no previous prototype for 'curses_enable_serial' [-Wmissing-prototypes] curses/pdcurses-backend/pdcutil.c:35:6: warning: no previous prototype for 'curses_enable_vga' [-Wmissing-prototypes] curses/pdcurses-backend/pdcutil.c:40:5: warning: function declaration isn't a prototype [-Wstrict-prototypes] curses/pdcurses-backend/pdcutil.c:45:5: warning: function declaration isn't a prototype [-Wstrict-prototypes] Change-Id: If0d4d475d3006f1a77f67ec46c6bdf4ee2906981 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- payloads/libpayload/curses/PDCurses-3.4/curses.h | 8 ++++++++ payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c | 1 + payloads/libpayload/curses/pdcurses-backend/pdcutil.c | 5 +++-- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/payloads/libpayload/curses/PDCurses-3.4/curses.h b/payloads/libpayload/curses/PDCurses-3.4/curses.h index 40585d3..5f651fe 100644 --- a/payloads/libpayload/curses/PDCurses-3.4/curses.h +++ b/payloads/libpayload/curses/PDCurses-3.4/curses.h @@ -1374,4 +1374,12 @@ int sb_refresh(void); } #endif +/* Local functions not defined in normal curses */ + +void curses_enable_vga(int); +void curses_enable_serial(int); + +int curses_vga_enabled(void); +int curses_serial_enabled(void); + #endif /* __PDCURSES__ */ diff --git a/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c b/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c index f0e83cf..d016063 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdcsetsc.c @@ -1,6 +1,7 @@ /* Public Domain Curses */ /* This file is BSD licensed, Copyright 2011 secunet AG */ +#include <libpayload.h> #include "lppdc.h" int PDC_curs_set(int visibility) diff --git a/payloads/libpayload/curses/pdcurses-backend/pdcutil.c b/payloads/libpayload/curses/pdcurses-backend/pdcutil.c index 8fb3e16..030f462 100644 --- a/payloads/libpayload/curses/pdcurses-backend/pdcutil.c +++ b/payloads/libpayload/curses/pdcurses-backend/pdcutil.c @@ -2,6 +2,7 @@ /* This file is BSD licensed, Copyright 2011 secunet AG */ #include "lppdc.h" +#include <curses.h> #include <libpayload.h> int curses_flags = F_ENABLE_SERIAL | F_ENABLE_CONSOLE; @@ -37,12 +38,12 @@ void curses_enable_vga(int enable) curses_flags = (curses_flags & ~F_ENABLE_CONSOLE) | (enable * F_ENABLE_CONSOLE); } -int curses_serial_enabled() +int curses_serial_enabled(void) { return !!(curses_flags & F_ENABLE_SERIAL); } -int curses_vga_enabled() +int curses_vga_enabled(void) { return !!(curses_flags & F_ENABLE_CONSOLE); }

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New patch to review for coreboot: 3bdb430 libpayload: Fix missing prototype warning for Xinitscr()
by Stefan Reinauer 25 Mar '13

25 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2907 -gerrit commit 3bdb43030c80f60cd75961f88042f2811ed6096d Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Mar 25 15:32:25 2013 -0700 libpayload: Fix missing prototype warning for Xinitscr() Xinitscr is only used internally in PDCurses, unless XCURSES is defined. This patch fixes a warning that is produced because of that. Change-Id: I211f75717276cf028e0b435f328d1687d3536eb7 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- payloads/libpayload/curses/PDCurses-3.4/pdcurses/initscr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/initscr.c b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/initscr.c index 2fb2600..165b7f9 100644 --- a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/initscr.c +++ b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/initscr.c @@ -108,6 +108,9 @@ MOUSE_STATUS Mouse_status, pdc_mouse_status; extern RIPPEDOFFLINE linesripped[5]; extern char linesrippedoff; +#ifndef XCURSES +static +#endif WINDOW *Xinitscr(int argc, char *argv[]) { int i;

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New patch to review for coreboot: 1614e1e libpayload: Fix variable shadowing in PDCurses
by Stefan Reinauer 25 Mar '13

25 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2906 -gerrit commit 1614e1eb3e531708cf75a11bd4bcd7683d9d0634 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Mar 25 15:30:30 2013 -0700 libpayload: Fix variable shadowing in PDCurses PDCurses has a function called overlay() and also uses overlay as a variable name in some functions. This patch fixes the ambiguity that caused warnings like curses/PDCurses-3.4/pdcurses/overlay.c: In function '_copy_win': curses/PDCurses-3.4/pdcurses/overlay.c:51:39: warning: declaration of 'overlay' shadows a global declaration [-Wshadow] In file included from curses/PDCurses-3.4/curspriv.h:16:0, from curses/PDCurses-3.4/pdcurses/overlay.c:3: curses/PDCurses-3.4/curses.h:1014:9: warning: shadowed declaration is here [-Wshadow] Change-Id: I907653df0c8bb32c98bdcbc6476e94d2da6e0e90 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- payloads/libpayload/curses/PDCurses-3.4/pdcurses/overlay.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/overlay.c b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/overlay.c index a1d5791..d1e9f21 100644 --- a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/overlay.c +++ b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/overlay.c @@ -48,7 +48,7 @@ RCSID("$Id: overlay.c,v 1.36 2008/07/14 12:35:23 wmcbrine Exp $") static int _copy_win(const WINDOW *src_w, WINDOW *dst_w, int src_tr, int src_tc, int src_br, int src_bc, int dst_tr, - int dst_tc, bool overlay) + int dst_tc, bool _overlay) { int col, line, y1, fc, *minchng, *maxchng; chtype *w1ptr, *w2ptr; @@ -79,7 +79,7 @@ static int _copy_win(const WINDOW *src_w, WINDOW *dst_w, int src_tr, for (col = 0; col < xdiff; col++) { if ((*w1ptr) != (*w2ptr) && - !((*w1ptr & A_CHARTEXT) == ' ' && overlay)) + !((*w1ptr & A_CHARTEXT) == ' ' && _overlay)) { *w2ptr = *w1ptr; @@ -228,7 +228,7 @@ int overwrite(const WINDOW *src_w, WINDOW *dst_w) } int copywin(const WINDOW *src_w, WINDOW *dst_w, int src_tr, int src_tc, - int dst_tr, int dst_tc, int dst_br, int dst_bc, int overlay) + int dst_tr, int dst_tc, int dst_br, int dst_bc, int _overlay) { int src_end_x, src_end_y; int src_rows, src_cols, dst_rows, dst_cols; @@ -252,5 +252,5 @@ int copywin(const WINDOW *src_w, WINDOW *dst_w, int src_tr, int src_tc, src_end_x = src_tc + min_cols; return _copy_win(src_w, dst_w, src_tr, src_tc, src_end_y, src_end_x, - dst_tr, dst_tc, overlay); + dst_tr, dst_tc, _overlay); }

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New patch to review for coreboot: 998a80d libpayload: Fix const warnings in keyname() and termname()
by Stefan Reinauer 25 Mar '13

25 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2905 -gerrit commit 998a80d9bfe341957d6db1fdc4f6c6ed59e7dfb6 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Mar 25 15:15:16 2013 -0700 libpayload: Fix const warnings in keyname() and termname() The keyname() and termname() functions were creating a whole lot of warnings of the style curses/PDCurses-3.4/pdcurses/keyname.c:41:9: warning: initialization discards 'const' qualifier from pointer target type [enabled by default] This patch fixes them. Change-Id: Iae3c4e5201b48c2d2033cac48577e0462a34f309 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- payloads/libpayload/curses/PDCurses-3.4/curses.h | 4 ++-- payloads/libpayload/curses/PDCurses-3.4/pdcurses/keyname.c | 4 ++-- payloads/libpayload/curses/PDCurses-3.4/pdcurses/termattr.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/payloads/libpayload/curses/PDCurses-3.4/curses.h b/payloads/libpayload/curses/PDCurses-3.4/curses.h index 88942c0..40585d3 100644 --- a/payloads/libpayload/curses/PDCurses-3.4/curses.h +++ b/payloads/libpayload/curses/PDCurses-3.4/curses.h @@ -945,7 +945,7 @@ int intrflush(WINDOW *, bool); bool isendwin(void); bool is_linetouched(WINDOW *, int); bool is_wintouched(WINDOW *); -char *keyname(int); +const char *keyname(int); int keypad(WINDOW *, bool); char killchar(void); int leaveok(WINDOW *, bool); @@ -1061,7 +1061,7 @@ WINDOW *subwin(WINDOW *, int, int, int, int); int syncok(WINDOW *, bool); chtype termattrs(void); attr_t term_attrs(void); -char *termname(void); +const char *termname(void); void timeout(int); int touchline(WINDOW *, int, int); int touchwin(WINDOW *); diff --git a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/keyname.c b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/keyname.c index 4d300ff..5bfeb6e 100644 --- a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/keyname.c +++ b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/keyname.c @@ -32,11 +32,11 @@ RCSID("$Id: keyname.c,v 1.8 2008/07/13 16:08:18 wmcbrine Exp $") **man-end****************************************************************/ -char *keyname(int key) +const char *keyname(int key) { /* Key names must be in exactly the same order as in curses.h */ - static char *key_name[] = + static const char *key_name[] = { "KEY_BREAK", "KEY_DOWN", "KEY_UP", "KEY_LEFT", "KEY_RIGHT", "KEY_HOME", "KEY_BACKSPACE", "KEY_F0", "KEY_F(1)", "KEY_F(2)", diff --git a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/termattr.c b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/termattr.c index f25ee95..7e49047 100644 --- a/payloads/libpayload/curses/PDCurses-3.4/pdcurses/termattr.c +++ b/payloads/libpayload/curses/PDCurses-3.4/pdcurses/termattr.c @@ -135,7 +135,7 @@ attr_t term_attrs(void) WA_RIGHT | WA_UNDERLINE; } -char *termname(void) +const char *termname(void) { PDC_LOG(("termname() - called\n"));

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coreboot-gerrit March 2013