Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44260 )
Change subject: soc/intel/tigerlake: Add IRQs for LPSS uart ......................................................................
soc/intel/tigerlake: Add IRQs for LPSS uart
Values are taken from pci_irqs.asl. The common code will make use of those defines to generate ACPI SSDT code for LPSS uarts operating in "APCI mode".
Change-Id: I5ef93493965834cda30d70918e65de3129e547b7 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/tigerlake/include/soc/irq.h 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/44260/1
diff --git a/src/soc/intel/tigerlake/include/soc/irq.h b/src/soc/intel/tigerlake/include/soc/irq.h index ad70290..f95f9f6 100644 --- a/src/soc/intel/tigerlake/include/soc/irq.h +++ b/src/soc/intel/tigerlake/include/soc/irq.h @@ -9,4 +9,8 @@ #define PCH_IRQ10 10 #define PCH_IRQ11 11
+#define LPSS_UART0_IRQ 16 +#define LPSS_UART1_IRQ 17 +#define LPSS_UART2_IRQ 33 + #endif /* _SOC_IRQ_H_ */
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44260 )
Change subject: soc/intel/tigerlake: Add IRQs for LPSS uart ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/44260/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44260/1//COMMIT_MSG@11 PS1, Line 11: APCI ACPI
Christian Walter has uploaded a new patch set (#2) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/44260 )
Change subject: soc/intel/tigerlake: Add IRQs for LPSS uart ......................................................................
soc/intel/tigerlake: Add IRQs for LPSS uart
Values are taken from pci_irqs.asl. The common code will make use of those defines to generate ACPI SSDT code for LPSS uarts operating in "ACPI mode".
Change-Id: I5ef93493965834cda30d70918e65de3129e547b7 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/tigerlake/include/soc/irq.h 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/44260/2
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44260 )
Change subject: soc/intel/tigerlake: Add IRQs for LPSS uart ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/44260/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44260/1//COMMIT_MSG@11 PS1, Line 11: APCI
ACPI
Done
Patrick Rudolph has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44260 )
Change subject: soc/intel/tigerlake: Add IRQs for LPSS uart ......................................................................
soc/intel/tigerlake: Add IRQs for LPSS uart
Values are taken from pci_irqs.asl. The common code will make use of those defines to generate ACPI SSDT code for LPSS uarts operating in "ACPI mode".
Change-Id: I5ef93493965834cda30d70918e65de3129e547b7 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44260 Reviewed-by: Christian Walter christian.walter@9elements.com Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/tigerlake/include/soc/irq.h 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Christian Walter: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/tigerlake/include/soc/irq.h b/src/soc/intel/tigerlake/include/soc/irq.h index ad70290..f95f9f6 100644 --- a/src/soc/intel/tigerlake/include/soc/irq.h +++ b/src/soc/intel/tigerlake/include/soc/irq.h @@ -9,4 +9,8 @@ #define PCH_IRQ10 10 #define PCH_IRQ11 11
+#define LPSS_UART0_IRQ 16 +#define LPSS_UART1_IRQ 17 +#define LPSS_UART2_IRQ 33 + #endif /* _SOC_IRQ_H_ */
-
Angel Pons (Code Review) -
Christian Walter (Code Review)
-
Patrick Rudolph (Code Review)