Christian Walter uploaded patch set #2 to the change originally created by Patrick Rudolph.

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soc/intel/tigerlake: Add IRQs for LPSS uart

Values are taken from pci_irqs.asl.
The common code will make use of those defines to generate ACPI
SSDT code for LPSS uarts operating in "ACPI mode".

Change-Id: I5ef93493965834cda30d70918e65de3129e547b7
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/soc/intel/tigerlake/include/soc/irq.h
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/44260/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5ef93493965834cda30d70918e65de3129e547b7
Gerrit-Change-Number: 44260
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset