Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42086 )
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
soc/amd/picasso: Remove call to setup_bsp_ramtop
We don't use amd_setup_mtrrs in picasso.
BUG=b:147042464 TEST=Boot to OS on trembyle
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I1941934975dfea4f189347811b003a33996c887a --- M src/soc/amd/picasso/chip.c 1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/42086/1
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index dc661d2..e2b45b4 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <cpu/amd/mtrr.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -149,7 +148,6 @@
data_fabric_set_mmio_np(); southbridge_init(chip_info); - setup_bsp_ramtop(); }
static void soc_final(void *chip_info)
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42086 )
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/42086/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42086/1//COMMIT_MSG@9 PS1, Line 9: We don't use amd_setup_mtrrs in picasso. maybe be a bit more specific here: we're not using bsp_topmem() or bsp_topmem2() in picasso; those are the only two places that would depend on the setup_bsp_ramtop() call being done first
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42086 )
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Furquan Shaikh, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42086
to look at the new patch set (#2).
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
soc/amd/picasso: Remove call to setup_bsp_ramtop
We don't use amd_setup_mtrrs, bsp_topmem or bsp_topmem2 in picasso.
BUG=b:147042464 TEST=Boot to OS on trembyle
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I1941934975dfea4f189347811b003a33996c887a --- M src/soc/amd/picasso/chip.c 1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/42086/2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42086 )
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42086/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42086/1//COMMIT_MSG@9 PS1, Line 9: We don't use amd_setup_mtrrs in picasso.
maybe be a bit more specific here: we're not using bsp_topmem() or bsp_topmem2() in picasso; those a […]
Well amd_setup_mtrrs calls setup_ap_ramtop, which uses bsp_topmem/topmem2.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42086 )
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
soc/amd/picasso: Remove call to setup_bsp_ramtop
We don't use amd_setup_mtrrs, bsp_topmem or bsp_topmem2 in picasso.
BUG=b:147042464 TEST=Boot to OS on trembyle
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I1941934975dfea4f189347811b003a33996c887a Reviewed-on: https://review.coreboot.org/c/coreboot/+/42086 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/soc/amd/picasso/chip.c 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Felix Held: Looks good to me, approved
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index ed39b53..d364b9a 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <cpu/amd/mtrr.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -159,7 +158,6 @@
data_fabric_set_mmio_np(); southbridge_init(chip_info); - setup_bsp_ramtop(); }
static void soc_final(void *chip_info)
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42086 )
Change subject: soc/amd/picasso: Remove call to setup_bsp_ramtop ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/5046 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/5045 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/5044 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/5043
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
Aaron Durbin (Code Review)
-
Felix Held (Code Review)
-
Patrick Georgi (Code Review)
-
Raul Rangel (Code Review)