Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM.
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h M src/soc/mediatek/mt8192/include/soc/memlayout.ld A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 57 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/1
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 9bb9cfd..59d105c 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -41,6 +41,7 @@ ramstage-y += ../common/mmu_operations.c mmu_operations.c ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += soc.c +ramstage-y += mcupm.c ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c ramstage-y += ../common/usb.c usb.c @@ -52,6 +53,11 @@ spm_firmware.bin-type := raw spm_firmware.bin-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += mcupm.bin +mcupm.bin-file := $(MT8192_BLOB_DIR)/mcupm.bin +mcupm.bin-type := raw +mcupm.bin-compression := $(CBFS_COMPRESS_FLAG) + DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram $(DRAM_CBFS)-file := $(MT8192_BLOB_DIR)/dram.elf $(DRAM_CBFS)-type := stage diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 9760c88..9864e5b 100755 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -5,6 +5,8 @@
enum { MCUSYS_BASE = 0x0C530000, + MCUPM_SRAM_BASE = 0x0C540000, + MCUPM_CFG_BASE = 0x0C560000, IO_PHYS = 0x10000000, };
diff --git a/src/soc/mediatek/mt8192/include/soc/mcupm.h b/src/soc/mediatek/mt8192/include/soc/mcupm.h new file mode 100644 index 0000000..dcb8c4a --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/mcupm.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8192_MCUPM_H +#define SOC_MEDIATEK_MT8192_MCUPM_H + +#include <soc/addressmap.h> +#include <types.h> + +struct mt8192_mcupm_regs { + u32 sw_rstn; +}; +static struct mt8192_mcupm_regs *const mt8192_mcupm = (void *)MCUPM_CFG_BASE; +void mcupm_init(void); +#endif /* SOC_MEDIATEK_MT8192_MCUPM_H */ diff --git a/src/soc/mediatek/mt8192/include/soc/memlayout.ld b/src/soc/mediatek/mt8192/include/soc/memlayout.ld index df9d376..3bef5b1 100644 --- a/src/soc/mediatek/mt8192/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8192/include/soc/memlayout.ld @@ -37,7 +37,7 @@
DRAM_START(0x40000000) POSTRAM_CBFS_CACHE(0x40000000, 2M) - RAMSTAGE(0x40200000, 256K) + RAMSTAGE(0x40200000, 512K)
BL31(0x54600000, 0x60000) } diff --git a/src/soc/mediatek/mt8192/mcupm.c b/src/soc/mediatek/mt8192/mcupm.c new file mode 100644 index 0000000..88efc85 --- /dev/null +++ b/src/soc/mediatek/mt8192/mcupm.c @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/barrier.h> +#include <cbfs.h> +#include <console/console.h> +#include <device/mmio.h> +#include <soc/mcupm.h> +#include <string.h> + +#define BUF_SIZE (128 * KiB) +static uint8_t mcupm_bin[BUF_SIZE] __aligned(8); + +void mcupm_init(void) +{ + const char *file_name = "mcupm.bin"; + size_t fw_size = cbfs_boot_load_file(file_name, + mcupm_bin, + sizeof(mcupm_bin), + CBFS_TYPE_RAW); + + if (fw_size == 0) { + die("MCUPM file :mcupm.bin not found."); + } + + write32(&mt8192_mcupm->sw_rstn, 0x0); + write32((void *)(0x0C55FAA0), 0x0); + memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); + /* Memory barrier to ensure that all fw code is loaded + before we release the reset pin. */ + mb(); + write32(&mt8192_mcupm->sw_rstn, 0x1); +} diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 6978406..6deb833 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -4,6 +4,7 @@ #include <soc/emi.h> #include <soc/mmu_operations.h> #include <symbols.h> +#include <soc/mcupm.h>
static void soc_read_resources(struct device *dev) { @@ -13,6 +14,7 @@ static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); + mcupm_init(); }
static struct device_operations soc_ops = {
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 1:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/inc... PS1, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/inc... PS1, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/mcu... PS1, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/1/src/soc/mediatek/mt8192/soc... PS1, Line 17: mcupm_init(); please, no spaces at the start of a line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 2:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/inc... PS2, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/inc... PS2, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/mcu... PS2, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/2/src/soc/mediatek/mt8192/soc... PS2, Line 17: mcupm_init(); please, no spaces at the start of a line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 3:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/inc... PS3, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/inc... PS3, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/mcu... PS3, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/3/src/soc/mediatek/mt8192/soc... PS3, Line 17: mcupm_init(); please, no spaces at the start of a line
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 26: void *)(0x0C55FAA0) define a variable to explain what is 0x0c55faa0
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 15: const char *file_name = "mcupm.bin"; : size_t fw_size = cbfs_boot_load_file(file_name, : mcupm_bin, : sizeof(mcupm_bin), : CBFS_TYPE_RAW); : : if (fw_size == 0) { : die("MCUPM file :mcupm.bin not found."); : } : : write32(&mt8192_mcupm->sw_rstn, 0x0); : write32((void *)(0x0C55FAA0), 0x0); : memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); : /* Memory barrier to ensure that all fw code is loaded : before we release the reset pin. */ : mb(); : write32(&mt8192_mcupm->sw_rstn, 0x1); please indent properly.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 4:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/inc... PS4, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/inc... PS4, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/soc... PS4, Line 17: mcupm_init(); please, no spaces at the start of a line
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 4:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@2 PS4, Line 2: Odin Please use *Odin Chen* (maybe).
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@7 PS4, Line 7: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. Please remove the dot/period at the end of the commit message summary.
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@8 PS4, Line 8: Please elaborate, what the firmware is, and how much time it adds to the boot.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 5:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/inc... PS5, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/inc... PS5, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/mcu... PS5, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/5/src/soc/mediatek/mt8192/soc... PS5, Line 17: mcupm_init(); please, no spaces at the start of a line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 6:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/inc... PS6, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/inc... PS6, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/mcu... PS6, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/6/src/soc/mediatek/mt8192/soc... PS6, Line 17: mcupm_init(); please, no spaces at the start of a line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM. ......................................................................
Patch Set 7:
(17 comments)
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/addressmap.h:
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/inc... PS7, Line 8: MCUPM_SRAM_BASE = 0x0C540000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/inc... PS7, Line 9: MCUPM_CFG_BASE = 0x0C560000, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 15: const char *file_name = "mcupm.bin"; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 16: size_t fw_size = cbfs_boot_load_file(file_name, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 17: mcupm_bin, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 17: mcupm_bin, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 18: sizeof(mcupm_bin), code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 18: sizeof(mcupm_bin), please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 19: CBFS_TYPE_RAW); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 19: CBFS_TYPE_RAW); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 21: if (fw_size == 0) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 21: if (fw_size == 0) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 22: die("MCUPM file :mcupm.bin not found."); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 22: die("MCUPM file :mcupm.bin not found."); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 23: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/mcu... PS7, Line 27: memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/soc... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/46392/7/src/soc/mediatek/mt8192/soc... PS7, Line 17: mcupm_init(); please, no spaces at the start of a line
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#8).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h M src/soc/mediatek/mt8192/include/soc/memlayout.ld A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 59 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/8
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 8:
(5 comments)
Fix the coding style for now. Will come out a common API for loading MediaTek blob.
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@2 PS4, Line 2: Odin
Please use *Odin Chen* (maybe).
Ack
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@7 PS4, Line 7: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM.
Please remove the dot/period at the end of the commit message summary.
Ack
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@8 PS4, Line 8:
Please elaborate, what the firmware is, and how much time it adds to the boot.
The firmware is the MediaTek proprietary for MCU power management.
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 26: void *)(0x0C55FAA0)
define a variable to explain what is 0x0c55faa0
Ack
https://review.coreboot.org/c/coreboot/+/46392/4/src/soc/mediatek/mt8192/mcu... PS4, Line 15: const char *file_name = "mcupm.bin"; : size_t fw_size = cbfs_boot_load_file(file_name, : mcupm_bin, : sizeof(mcupm_bin), : CBFS_TYPE_RAW); : : if (fw_size == 0) { : die("MCUPM file :mcupm.bin not found."); : } : : write32(&mt8192_mcupm->sw_rstn, 0x0); : write32((void *)(0x0C55FAA0), 0x0); : memcpy((void *)MCUPM_SRAM_BASE, mcupm_bin, fw_size); : /* Memory barrier to ensure that all fw code is loaded : before we release the reset pin. */ : mb(); : write32(&mt8192_mcupm->sw_rstn, 0x1);
please indent properly.
Ack
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46392/4//COMMIT_MSG@8 PS4, Line 8:
The firmware is the MediaTek proprietary for MCU power management.
Ack
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#18).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the Mediatek proprietary for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 5 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/18
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#22).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the Mediatek proprietary for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 5 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/22
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#31).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the Mediatek proprietary for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 5 files changed, 48 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/31
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#32).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the Mediatek proprietary for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 5 files changed, 48 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/32
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 32:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46392/32//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46392/32//COMMIT_MSG@9 PS32, Line 9: firmware
https://review.coreboot.org/c/coreboot/+/46392/32//COMMIT_MSG@9 PS32, Line 9: Mediatek MediaTek
https://review.coreboot.org/c/coreboot/+/46392/32/src/soc/mediatek/mt8192/mc... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/32/src/soc/mediatek/mt8192/mc... PS32, Line 8: ( No need for the parentheses.
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#33).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 49 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/33
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#34).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary firmware for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 49 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/34
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 34:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46392/32//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46392/32//COMMIT_MSG@9 PS32, Line 9:
firmware
Done
https://review.coreboot.org/c/coreboot/+/46392/32//COMMIT_MSG@9 PS32, Line 9: Mediatek
MediaTek
Done
https://review.coreboot.org/c/coreboot/+/46392/32/src/soc/mediatek/mt8192/mc... File src/soc/mediatek/mt8192/mcupm.c:
https://review.coreboot.org/c/coreboot/+/46392/32/src/soc/mediatek/mt8192/mc... PS32, Line 8: (
No need for the parentheses.
Done
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#35).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary firmware for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 59 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/35
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#36).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary firmware for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 59 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/36
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#37).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary firmware for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 59 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/37
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 37: Code-Review+2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 37: Code-Review+2
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46392
to look at the new patch set (#39).
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary firmware for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 59 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46392/39
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
Patch Set 39: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46392 )
Change subject: soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM ......................................................................
soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPM
MCUPM is the MediaTek proprietary firmware for MCU power management.
TEST=1. emerge-asurada coreboot chromeos-bootimage; 2. See following log during booting. load_blob_file: Load mcupm.bin in 35 msecs, size 115668 bytes 3. Test suspend/resume by: a. suspend (on DUT): powerd_dbus_suspend b. resume (on host): dut-control power_state:on
Change-Id: I50bea1942507b4a40df9730b4e1bf98980d74277 Signed-off-by: Yidi Lin yidi.lin@mediatek.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46392 Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/mcupm.h A src/soc/mediatek/mt8192/mcupm.c M src/soc/mediatek/mt8192/soc.c 6 files changed, 59 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig index dbb35f6..36ad2e3 100644 --- a/src/soc/mediatek/mt8192/Kconfig +++ b/src/soc/mediatek/mt8192/Kconfig @@ -45,6 +45,12 @@ This option enables memory basic compare test to verify the DRAM read or write is as expected.
+config MCUPM_FIRMWARE + string + default "mcupm.bin" + help + The file name of the MediaTek MCUPM firmware. + config SPM_FIRMWARE string default "spm_firmware.bin" diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 3caa1ef..2fc8f39 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -40,6 +40,7 @@ ramstage-y += emi.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-y += ../common/mcu.c +ramstage-y += mcupm.c ramstage-y += ../common/mmu_operations.c mmu_operations.c ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += soc.c @@ -51,6 +52,7 @@ MT8192_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8192
mcu-firmware-files := \ + $(CONFIG_MCUPM_FIRMWARE) \ $(CONFIG_SPM_FIRMWARE)
$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 12094ff..c68403b 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -5,6 +5,8 @@
enum { MCUSYS_BASE = 0x0C530000, + MCUPM_SRAM_BASE = 0x0C540000, + MCUPM_CFG_BASE = 0x0C560000, IO_PHYS = 0x10000000, };
diff --git a/src/soc/mediatek/mt8192/include/soc/mcupm.h b/src/soc/mediatek/mt8192/include/soc/mcupm.h new file mode 100644 index 0000000..dcb8c4a --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/mcupm.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8192_MCUPM_H +#define SOC_MEDIATEK_MT8192_MCUPM_H + +#include <soc/addressmap.h> +#include <types.h> + +struct mt8192_mcupm_regs { + u32 sw_rstn; +}; +static struct mt8192_mcupm_regs *const mt8192_mcupm = (void *)MCUPM_CFG_BASE; +void mcupm_init(void); +#endif /* SOC_MEDIATEK_MT8192_MCUPM_H */ diff --git a/src/soc/mediatek/mt8192/mcupm.c b/src/soc/mediatek/mt8192/mcupm.c new file mode 100644 index 0000000..70981a0 --- /dev/null +++ b/src/soc/mediatek/mt8192/mcupm.c @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/mmio.h> +#include <soc/mcu_common.h> +#include <soc/mcupm.h> +#include <soc/symbols.h> + +#define ABNORMALBOOT_REG 0x0C55FAA0 + +static void reset_mcupm(struct mtk_mcu *mcu) +{ + /* Clear abnormal boot register */ + write32((void *)ABNORMALBOOT_REG, 0x0); + write32(&mt8192_mcupm->sw_rstn, 0x1); +} + +static struct mtk_mcu mcupm = { + .firmware_name = CONFIG_MCUPM_FIRMWARE, + .run_address = (void *)MCUPM_SRAM_BASE, + .reset = reset_mcupm, +}; + +void mcupm_init(void) +{ + mcupm.load_buffer = _dram_dma; + mcupm.buffer_size = REGION_SIZE(dram_dma); + + write32(&mt8192_mcupm->sw_rstn, 0x0); + + if (mtk_init_mcu(&mcupm)) + die("%s() failed\n", __func__); +} diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 6978406..00a57d2 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -2,6 +2,7 @@
#include <device/device.h> #include <soc/emi.h> +#include <soc/mcupm.h> #include <soc/mmu_operations.h> #include <symbols.h>
@@ -13,6 +14,7 @@ static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); + mcupm_init(); }
static struct device_operations soc_ops = {
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Hung-Te Lin (Code Review)
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