Change in ...coreboot[master]: Add support for the Fujitsu E900 with autoport generated sources
Eloy has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32346
Change subject: Add support for the Fujitsu E900 with autoport generated sources ......................................................................
Add support for the Fujitsu E900 with autoport generated sources
There is no license file in the ACPI files. USB is tested and works, PS/2 does not work yet.
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 16 files changed, 640 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/1
diff --git a/src/mainboard/fujitsu/Kconfig b/src/mainboard/fujitsu/Kconfig new file mode 100644 index 0000000..0f482d3 --- /dev/null +++ b/src/mainboard/fujitsu/Kconfig @@ -0,0 +1,16 @@ +if VENDOR_FUJITSU + +choice + prompt "Mainboard model" + +source "src/mainboard/fujitsu/*/Kconfig.name" + +endchoice + +source "src/mainboard/fujitsu/*/Kconfig" + +config MAINBOARD_VENDOR + string + default "FUJITSU" + +endif # VENDOR_FUJITSU diff --git a/src/mainboard/fujitsu/Kconfig.name b/src/mainboard/fujitsu/Kconfig.name new file mode 100644 index 0000000..a01fa7b --- /dev/null +++ b/src/mainboard/fujitsu/Kconfig.name @@ -0,0 +1,2 @@ +config VENDOR_FUJITSU + bool "FUJITSU" diff --git a/src/mainboard/fujitsu/esprimo_e900/Kconfig b/src/mainboard/fujitsu/esprimo_e900/Kconfig new file mode 100644 index 0000000..28d5082 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/Kconfig @@ -0,0 +1,49 @@ +if BOARD_FUJITSU_ESPRIMO_E900 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_8192 + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select INTEL_INT15 + select NORTHBRIDGE_INTEL_SANDYBRIDGE + select SERIRQ_CONTINUOUS_MODE + select SOUTHBRIDGE_INTEL_BD82X6X + select USE_NATIVE_RAMINIT + +config MAINBOARD_DIR + string + default fujitsu/esprimo_e900 + +config MAINBOARD_PART_NUMBER + string + default "ESPRIMO E900" + +config VGA_BIOS_FILE + string + default "pci8086,0102.rom" + +config VGA_BIOS_ID + string + default "8086,0102" + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x11ba + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x1734 + +config DRAM_RESET_GATE_GPIO # FIXME: check this + int + default 60 + +config MAX_CPUS + int + default 8 + +config USBDEBUG_HCD_INDEX # FIXME: check this + int + default 2 +endif diff --git a/src/mainboard/fujitsu/esprimo_e900/Kconfig.name b/src/mainboard/fujitsu/esprimo_e900/Kconfig.name new file mode 100644 index 0000000..3d2d9c1 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_FUJITSU_ESPRIMO_E900 + bool "ESPRIMO E900" diff --git a/src/mainboard/fujitsu/esprimo_e900/Makefile.inc b/src/mainboard/fujitsu/esprimo_e900/Makefile.inc new file mode 100644 index 0000000..3dae61e --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/Makefile.inc @@ -0,0 +1 @@ +romstage-y += gpio.c diff --git a/src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl b/src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl diff --git a/src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl b/src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl new file mode 100644 index 0000000..0222986 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl @@ -0,0 +1,8 @@ +Method(_WAK,1) +{ + Return(Package(){0,0}) +} + +Method(_PTS,1) +{ +} diff --git a/src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl b/src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl diff --git a/src/mainboard/fujitsu/esprimo_e900/acpi_tables.c b/src/mainboard/fujitsu/esprimo_e900/acpi_tables.c new file mode 100644 index 0000000..6b731cc --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/acpi_tables.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <southbridge/intel/bd82x6x/nvs.h> + +/* FIXME: check this function. */ +void acpi_create_gnvs(global_nvs_t *gnvs) +{ + /* Disable USB ports in S3 by default */ + gnvs->s3u0 = 0; + gnvs->s3u1 = 0; + + /* Disable USB ports in S5 by default */ + gnvs->s5u0 = 0; + gnvs->s5u1 = 0; + + // the lid is open by default. + gnvs->lids = 1; + + gnvs->tcrt = 100; + gnvs->tpsv = 90; +} diff --git a/src/mainboard/fujitsu/esprimo_e900/board_info.txt b/src/mainboard/fujitsu/esprimo_e900/board_info.txt new file mode 100644 index 0000000..be6bff8 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/board_info.txt @@ -0,0 +1,4 @@ +Category: desktop +ROM protocol: SPI +Flashrom support: n +FIXME: check category, , put ROM package, ROM socketed, Release year diff --git a/src/mainboard/fujitsu/esprimo_e900/devicetree.cb b/src/mainboard/fujitsu/esprimo_e900/devicetree.cb new file mode 100644 index 0000000..e69133d --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/devicetree.cb @@ -0,0 +1,109 @@ +chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did + register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" + register "gfx.link_frequency_270_mhz" = "0" + register "gfx.ndid" = "3" + register "gfx.use_spread_spectrum_clock" = "0" + register "gpu_cpu_backlight" = "0x00000000" + register "gpu_dp_b_hotplug" = "4" + register "gpu_dp_c_hotplug" = "4" + register "gpu_dp_d_hotplug" = "4" + register "gpu_panel_port_select" = "0" + register "gpu_panel_power_backlight_off_delay" = "0" + register "gpu_panel_power_backlight_on_delay" = "0" + register "gpu_panel_power_cycle_delay" = "4" + register "gpu_panel_power_down_delay" = "0" + register "gpu_panel_power_up_delay" = "0" + register "gpu_pch_backlight" = "0x00000000" + device cpu_cluster 0x0 on + chip cpu/intel/model_206ax # FIXME: check all registers + register "c1_acpower" = "1" + register "c1_battery" = "1" + register "c2_acpower" = "3" + register "c2_battery" = "3" + register "c3_acpower" = "5" + register "c3_battery" = "5" + device lapic 0x0 on + end + device lapic 0xacac off + end + end + end + device domain 0x0 on + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "c2_latency" = "0x0065" + register "docking_supported" = "0" + register "gen1_dec" = "0x003c0601" + register "gen2_dec" = "0x000c0641" + register "gen3_dec" = "0x00000000" + register "gen4_dec" = "0x00000000" + register "p_cnt_throttling_supported" = "1" + register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" + register "pcie_port_coalesce" = "1" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x3f" + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + device pci 16.0 on # Management Engine Interface 1 + subsystemid 0x1734 0x11ba + end + device pci 16.1 off # Management Engine Interface 2 + end + device pci 16.2 off # Management Engine IDE-R + end + device pci 16.3 off # Management Engine KT + end + device pci 19.0 on # Intel Gigabit Ethernet + subsystemid 0x1734 0x11b7 + end + device pci 1a.0 on # USB2 EHCI #2 + subsystemid 0x1734 0x11ba + end + device pci 1b.0 on # High Definition Audio Audio controller + subsystemid 0x1734 0x11b0 + end + device pci 1c.0 off # PCIe Port #1 + end + device pci 1c.1 off # PCIe Port #2 + end + device pci 1c.2 off # PCIe Port #3 + end + device pci 1c.3 off # PCIe Port #4 + end + device pci 1c.4 off # PCIe Port #5 + end + device pci 1c.5 off # PCIe Port #6 + end + device pci 1c.6 off # PCIe Port #7 + end + device pci 1c.7 off # PCIe Port #8 + end + device pci 1d.0 on # USB2 EHCI #1 + subsystemid 0x1734 0x11ba + end + device pci 1e.0 on # PCI bridge + subsystemid 0x1734 0x11ba + end + device pci 1f.0 on # LPC bridge PCI-LPC bridge + subsystemid 0x1734 0x11ba + end + device pci 1f.2 on # SATA Controller 1 + subsystemid 0x1734 0x11ba + end + device pci 1f.3 on # SMBus + subsystemid 0x1734 0x11ba + end + device pci 1f.5 off # SATA Controller 2 + end + device pci 1f.6 off # Thermal + end + end + device pci 00.0 on # Host bridge Host bridge + subsystemid 0x1734 0x11b9 + end + device pci 01.0 off # PCIe Bridge for discrete graphics + end + device pci 02.0 on # Internal graphics VGA controller + subsystemid 0x1734 0x11b9 + end + end +end diff --git a/src/mainboard/fujitsu/esprimo_e900/dsdt.asl b/src/mainboard/fujitsu/esprimo_e900/dsdt.asl new file mode 100644 index 0000000..c7b42e0 --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/dsdt.asl @@ -0,0 +1,29 @@ +#define BRIGHTNESS_UP _SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN _SB.PCI0.GFX0.DECB +#define ACPI_VIDEO_DEVICE _SB.PCI0.GFX0 + +#include <arch/acpi.h> +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI 2.0 and up + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20141018 // OEM revision +) +{ + /* Some generic macros */ + #include "acpi/platform.asl" + #include <cpu/intel/common/acpi/cpu.asl> + #include <southbridge/intel/bd82x6x/acpi/platform.asl> + /* global NVS and variables. */ + #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> + #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + + Device (_SB.PCI0) + { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } +} diff --git a/src/mainboard/fujitsu/esprimo_e900/gpio.c b/src/mainboard/fujitsu/esprimo_e900/gpio.c new file mode 100644 index 0000000..c60a27b --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/gpio.c @@ -0,0 +1,210 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <southbridge/intel/common/gpio.h> + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_NATIVE, + .gpio3 = GPIO_MODE_NATIVE, + .gpio4 = GPIO_MODE_NATIVE, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_NATIVE, + .gpio11 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_GPIO, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio11 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_INPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio19 = GPIO_DIR_INPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_INPUT, + .gpio29 = GPIO_DIR_INPUT, + .gpio30 = GPIO_DIR_INPUT, + .gpio31 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio31 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio24 = GPIO_RESET_RSMRST, + .gpio28 = GPIO_RESET_RSMRST, + .gpio29 = GPIO_RESET_RSMRST, + .gpio31 = GPIO_RESET_RSMRST, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio1 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio7 = GPIO_INVERT, + .gpio8 = GPIO_INVERT, + .gpio11 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, + .gpio15 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_NATIVE, + .gpio39 = GPIO_MODE_NATIVE, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_NATIVE, + .gpio44 = GPIO_MODE_GPIO, + .gpio45 = GPIO_MODE_GPIO, + .gpio46 = GPIO_MODE_GPIO, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_NATIVE, + .gpio51 = GPIO_MODE_NATIVE, + .gpio52 = GPIO_MODE_NATIVE, + .gpio53 = GPIO_MODE_NATIVE, + .gpio54 = GPIO_MODE_NATIVE, + .gpio55 = GPIO_MODE_NATIVE, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_NATIVE, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_INPUT, + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_INPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio44 = GPIO_DIR_INPUT, + .gpio45 = GPIO_DIR_INPUT, + .gpio46 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_OUTPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_OUTPUT, + .gpio72 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio69 = GPIO_LEVEL_LOW, + .gpio71 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/fujitsu/esprimo_e900/hda_verb.c b/src/mainboard/fujitsu/esprimo_e900/hda_verb.c new file mode 100644 index 0000000..22ad26b --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/hda_verb.c @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + 0x14f150a2, /* Codec Vendor / Device ID: Conexant */ + 0x173411b0, /* Subsystem ID */ + + 0x0000000c, /* Number of 4 dword sets */ + /* NID 0x01: Subsystem ID. */ + AZALIA_SUBVENDOR(0x2, 0x173411b0), + + /* NID 0x18. */ + AZALIA_PIN_CFG(0x2, 0x18, 0x41a700f0), + + /* NID 0x19. */ + AZALIA_PIN_CFG(0x2, 0x19, 0x02211040), + + /* NID 0x1a. */ + AZALIA_PIN_CFG(0x2, 0x1a, 0x02a11020), + + /* NID 0x1b. */ + AZALIA_PIN_CFG(0x2, 0x1b, 0x01a19030), + + /* NID 0x1c. */ + AZALIA_PIN_CFG(0x2, 0x1c, 0x01014010), + + /* NID 0x1d. */ + AZALIA_PIN_CFG(0x2, 0x1d, 0x0181303e), + + /* NID 0x1e. */ + AZALIA_PIN_CFG(0x2, 0x1e, 0x418130f0), + + /* NID 0x1f. */ + AZALIA_PIN_CFG(0x2, 0x1f, 0x9017111f), + + /* NID 0x20. */ + AZALIA_PIN_CFG(0x2, 0x20, 0x414570f0), + + /* NID 0x21. */ + AZALIA_PIN_CFG(0x2, 0x21, 0x4144e1f0), + + /* NID 0x26. */ + AZALIA_PIN_CFG(0x2, 0x26, 0x41c570f0), + 0x80862805, /* Codec Vendor / Device ID: Intel */ + 0x80862805, /* Subsystem ID */ + + 0x00000004, /* Number of 4 dword sets */ + /* NID 0x01: Subsystem ID. */ + AZALIA_SUBVENDOR(0x3, 0x80862805), + + /* NID 0x05. */ + AZALIA_PIN_CFG(0x3, 0x05, 0x18560010), + + /* NID 0x06. */ + AZALIA_PIN_CFG(0x3, 0x06, 0x18560020), + + /* NID 0x07. */ + AZALIA_PIN_CFG(0x3, 0x07, 0x58560030), +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/fujitsu/esprimo_e900/mainboard.c b/src/mainboard/fujitsu/esprimo_e900/mainboard.c new file mode 100644 index 0000000..1f96d9e --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/mainboard.c @@ -0,0 +1,15 @@ +#include <device/device.h> +#include <drivers/intel/gma/int15.h> +#include <southbridge/intel/bd82x6x/pch.h> + +static void mainboard_enable(struct device *dev) +{ + /* FIXME: fix those values*/ + install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, + GMA_INT15_PANEL_FIT_DEFAULT, + GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/fujitsu/esprimo_e900/romstage.c b/src/mainboard/fujitsu/esprimo_e900/romstage.c new file mode 100644 index 0000000..e0bd08d --- /dev/null +++ b/src/mainboard/fujitsu/esprimo_e900/romstage.c @@ -0,0 +1,80 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* FIXME: Check if all includes are needed. */ + +#include <stdint.h> +#include <string.h> +#include <timestamp.h> +#include <arch/byteorder.h> +#include <arch/io.h> +#include <device/mmio.h> +#include <device/pci_ops.h> +#include <device/pnp_ops.h> +#include <console/console.h> +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> +#include <southbridge/intel/common/gpio.h> + +void pch_enable_lpc(void) +{ + pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x3f05); + pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x003c0601); + pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000c0641); + pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x00000000); + pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000000); + pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010); +} + +void mainboard_rcba_config(void) +{ +} + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 1 }, + { 1, 0, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 4 }, + { 1, 0, 4 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 }, + { 1, 0, 6 }, +}; + +void mainboard_early_init(int s3resume) +{ +} + +void mainboard_config_superio(void) +{ +} + +/* FIXME: Put proper SPD map here. */ +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[1], 0x51, id_only); + read_spd(&spd[2], 0x52, id_only); + read_spd(&spd[3], 0x53, id_only); +}
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: Add support for the Fujitsu E900 with autoport generated sources ......................................................................
Patch Set 1:
(4 comments)
If it passes the build tests, this could be committed soon, and the rest be fixed up in separate follow-up commits.
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG@7 PS1, Line 7: Add support for the Fujitsu E900 with autoport generated sources Please add a prefix:
mainboards: Add support for Fujitsu E900
Move the autoport information to the commit message body please.
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG@10 PS1, Line 10: USB is tested and works, PS/2 does not work yet. Make this a list/enumeration.
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG@10 PS1, Line 10: PS/2 does not work yet. Likely a Super I/O issue.
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG@11 PS1, Line 11: Please add a little more information.
1. What chipset/processor is this? 2. How much RAM did you test with, and what slots were populated? 3. What payload and version did you use? 4. What Linux kernel version did you use? 5. How did you test USB?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: Add support for the Fujitsu E900 with autoport generated sources ......................................................................
Patch Set 1:
(21 comments)
Looks like it's missing all the SuperIO-related stuff, plus PCIe ports, plus libgfxinit.
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG@10 PS1, Line 10: PS/2 does not work yet.
Likely a Super I/O issue.
It definitely is.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/K... File src/mainboard/fujitsu/esprimo_e900/Kconfig:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/K... PS1, Line 38: # FIXME: check this How to check if this is correct: suspend/resume should work.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/M... File src/mainboard/fujitsu/esprimo_e900/Makefile.inc:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/M... PS1, Line 2: You may want to hook up libgfxinit.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/a... File src/mainboard/fujitsu/esprimo_e900/acpi_tables.c:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/a... PS1, Line 30: : // the lid is open by default. : gnvs->lids = 1; Which lid? I think this isn't a laptop.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/b... File src/mainboard/fujitsu/esprimo_e900/board_info.txt:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/b... PS1, Line 4: FIXME: check category, , put ROM package, ROM socketed, Release year FIXME
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/devicetree.cb:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 3: register "gfx.link_frequency_270_mhz" = "0" Can be removed
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 5: register "gfx.use_spread_spectrum_clock" = "0" : register "gpu_cpu_backlight" = "0x00000000" : register "gpu_dp_b_hotplug" = "4" : register "gpu_dp_c_hotplug" = "4" : register "gpu_dp_d_hotplug" = "4" : register "gpu_panel_port_select" = "0" : register "gpu_panel_power_backlight_off_delay" = "0" : register "gpu_panel_power_backlight_on_delay" = "0" : register "gpu_panel_power_cycle_delay" = "4" : register "gpu_panel_power_down_delay" = "0" : register "gpu_panel_power_up_delay" = "0" : register "gpu_pch_backlight" = "0x00000000" Can be removed
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 25: device lapic 0x0 on : end : device lapic 0xacac off : end Please put the "end" on the same line
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 31: : Add this line here:
subsystemid 0x1734 0x11ba inherit
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 37: register "gen3_dec" = "0x00000000" : register "gen4_dec" = "0x00000000" Can be removed
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 40: register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" Can be removed
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 49: device pci 16.1 off # Management Engine Interface 2 : end Please move the "end" to the previous line
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 59: subsystemid 0x1734 0x11ba After doing what the comment on line 32 says, lines like this one with the same subsystemid can be removed.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 64: device pci 1c.0 off # PCIe Port #1 : end : device pci 1c.1 off # PCIe Port #2 : end : device pci 1c.2 off # PCIe Port #3 : end : device pci 1c.3 off # PCIe Port #4 : end : device pci 1c.4 off # PCIe Port #5 : end : device pci 1c.5 off # PCIe Port #6 : end : device pci 1c.6 off # PCIe Port #7 : end : device pci 1c.7 off # PCIe Port #8 : end Does that board have any PCIe ports? It's weird none are enabled.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 86: device pci 1f.0 on # LPC bridge PCI-LPC bridge There should be something about the SuperIO here.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 100: Host bridge Duplicated comment
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 100: device pci 00.0 on # Host bridge Host bridge : subsystemid 0x1734 0x11b9 : end : device pci 01.0 off # PCIe Bridge for discrete graphics : end : device pci 02.0 on # Internal graphics VGA controller : subsystemid 0x1734 0x11b9 : end This block can be moved above the "chip southbridge/intel/bd82x6x" line
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/dsdt.asl:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 15: /* Some generic macros */ Please remove this comment.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/m... File src/mainboard/fujitsu/esprimo_e900/mainboard.c:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/m... PS1, Line 8: GMA_INT15_ACTIVE_LFP_INT_LVDS This seems wrong.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/r... File src/mainboard/fujitsu/esprimo_e900/romstage.c:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/r... PS1, Line 39: pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x00000000); : pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000000); These can be removed
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/r... PS1, Line 73: /* FIXME: Put proper SPD map here. */ How many RAM slots does this board have?
Hello Angel Pons, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#2).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport. There is no license file in the ACPI files, hence the build error.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Does not work yet: * S3 resume * PS/2 * Graphics
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 16 files changed, 640 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/2
Eloy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
Patch Set 2:
(14 comments)
Mostly small fixes in the devicetree
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32346/1//COMMIT_MSG@10 PS1, Line 10: USB is tested and works, PS/2 does not work yet.
Make this a list/enumeration.
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/devicetree.cb:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 3: register "gfx.link_frequency_270_mhz" = "0"
Can be removed
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 5: register "gfx.use_spread_spectrum_clock" = "0" : register "gpu_cpu_backlight" = "0x00000000" : register "gpu_dp_b_hotplug" = "4" : register "gpu_dp_c_hotplug" = "4" : register "gpu_dp_d_hotplug" = "4" : register "gpu_panel_port_select" = "0" : register "gpu_panel_power_backlight_off_delay" = "0" : register "gpu_panel_power_backlight_on_delay" = "0" : register "gpu_panel_power_cycle_delay" = "4" : register "gpu_panel_power_down_delay" = "0" : register "gpu_panel_power_up_delay" = "0" : register "gpu_pch_backlight" = "0x00000000"
Can be removed
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 25: device lapic 0x0 on : end : device lapic 0xacac off : end
Please put the "end" on the same line
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 31: :
Add this line here: […]
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 37: register "gen3_dec" = "0x00000000" : register "gen4_dec" = "0x00000000"
Can be removed
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 40: register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
Can be removed
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 49: device pci 16.1 off # Management Engine Interface 2 : end
Please move the "end" to the previous line
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 59: subsystemid 0x1734 0x11ba
After doing what the comment on line 32 says, lines like this one with the same subsystemid can be r […]
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 64: device pci 1c.0 off # PCIe Port #1 : end : device pci 1c.1 off # PCIe Port #2 : end : device pci 1c.2 off # PCIe Port #3 : end : device pci 1c.3 off # PCIe Port #4 : end : device pci 1c.4 off # PCIe Port #5 : end : device pci 1c.5 off # PCIe Port #6 : end : device pci 1c.6 off # PCIe Port #7 : end : device pci 1c.7 off # PCIe Port #8 : end
Does that board have any PCIe ports? It's weird none are enabled.
It does have two PCIe x16 slots and one PCIe x1 slot.
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 100: Host bridge
Duplicated comment
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 100: device pci 00.0 on # Host bridge Host bridge : subsystemid 0x1734 0x11b9 : end : device pci 01.0 off # PCIe Bridge for discrete graphics : end : device pci 02.0 on # Internal graphics VGA controller : subsystemid 0x1734 0x11b9 : end
This block can be moved above the "chip southbridge/intel/bd82x6x" line
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/dsdt.asl:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/d... PS1, Line 15: /* Some generic macros */
Please remove this comment.
Done
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/r... File src/mainboard/fujitsu/esprimo_e900/romstage.c:
https://review.coreboot.org/#/c/32346/1/src/mainboard/fujitsu/esprimo_e900/r... PS1, Line 73: /* FIXME: Put proper SPD map here. */
How many RAM slots does this board have?
It has 4 slots
Hello Angel Pons, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#3).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport. There is no license file in the ACPI files, hence the build error.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Does not work yet: * S3 resume * PS/2 * Graphics
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- M Documentation/index.md R Documentation/lib/abi-data-consumption.md M Documentation/lib/index.md R Documentation/lib/timestamp.md D Documentation/security.md M payloads/libpayload/drivers/timer/Kconfig M src/arch/x86/include/arch/acpigen.h A src/arch/x86/include/arch/intel-family.h M src/arch/x86/smbios.c M src/ec/google/wilco/Makefile.inc A src/ec/google/wilco/boardid.c M src/ec/google/wilco/chip.c M src/ec/google/wilco/commands.c M src/ec/google/wilco/commands.h M src/include/smbios.h M src/mainboard/aopen/dxplplusu/Kconfig M src/mainboard/apple/macbookair4_2/Kconfig M src/mainboard/asrock/b75pro3-m/Kconfig M src/mainboard/asrock/h81m-hds/Kconfig M src/mainboard/asus/h61m-cs/Kconfig M src/mainboard/asus/maximus_iv_gene-z/Kconfig M src/mainboard/asus/p8h61-m_lx/Kconfig M src/mainboard/asus/p8h61-m_pro/Kconfig M src/mainboard/compulab/intense_pc/Kconfig A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c M src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/hatch/bootblock.c M src/mainboard/google/hatch/ramstage.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/hatch/variants/kohaku/Makefile.inc A src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/kukui/chromeos.c M src/mainboard/google/kukui/gpio.h M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/octopus/variants/bloog/gpio.c M src/mainboard/google/octopus/variants/bobba/gpio.c M src/mainboard/google/octopus/variants/fleex/gpio.c M src/mainboard/google/octopus/variants/meep/gpio.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/parrot/Kconfig M src/mainboard/google/sarien/Kconfig M src/mainboard/google/sarien/ramstage.c M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/arcada/gpio.c M src/mainboard/google/sarien/variants/sarien/devicetree.cb M src/mainboard/google/stout/Kconfig M src/mainboard/hp/2570p/Kconfig M src/mainboard/hp/2760p/Kconfig M src/mainboard/hp/8460p/Kconfig M src/mainboard/hp/8470p/Kconfig M src/mainboard/hp/8770w/Kconfig M src/mainboard/hp/compaq_8200_elite_sff/Kconfig M src/mainboard/hp/folio_9470m/Kconfig M src/mainboard/hp/revolve_810_g1/Kconfig M src/mainboard/intel/dcp847ske/Kconfig M src/mainboard/kontron/ktqm77/Kconfig M src/mainboard/lenovo/l520/Kconfig M src/mainboard/lenovo/s230u/Kconfig M src/mainboard/lenovo/t420/Kconfig M src/mainboard/lenovo/t420s/Kconfig M src/mainboard/lenovo/t430/Kconfig M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t520/Kconfig M src/mainboard/lenovo/t530/Kconfig M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x1_carbon_gen1/Kconfig M src/mainboard/lenovo/x220/Kconfig M src/mainboard/lenovo/x230/Kconfig M src/mainboard/sapphire/pureplatinumh61/Kconfig M src/mainboard/supermicro/x10slm-f/Kconfig M src/northbridge/intel/sandybridge/early_init.c M src/northbridge/intel/sandybridge/romstage.c M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/include/soc/iomap.h M src/soc/intel/cannonlake/include/soc/systemagent.h M src/soc/intel/cannonlake/romstage/fsp_params.c M src/soc/intel/cannonlake/systemagent.c M src/soc/intel/common/block/dsp/dsp.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/timer/timer.c M src/soc/mediatek/common/include/soc/timer.h M src/soc/mediatek/common/timer.c M src/soc/mediatek/mt8173/timer.c M src/southbridge/intel/bd82x6x/early_pch.c M src/southbridge/intel/bd82x6x/pch.h M util/autoport/bd82x6x.go M util/docker/coreboot-jenkins-node/Dockerfile 109 files changed, 1,341 insertions(+), 461 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/32346/3/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/devicetree.cb:
https://review.coreboot.org/#/c/32346/3/src/mainboard/fujitsu/esprimo_e900/d... PS3, Line 17: subsystemid 0x1734 0x11ba inherit trailing whitespace
https://review.coreboot.org/#/c/32346/3/src/mainboard/fujitsu/esprimo_e900/d... PS3, Line 18: device pci 00.0 on end # Host bridge trailing whitespace
https://review.coreboot.org/#/c/32346/3/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/baseboard/gpio.c:
https://review.coreboot.org/#/c/32346/3/src/mainboard/google/octopus/variant... PS3, Line 252: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), /* EN_PP3300_WLAN_L */ line over 80 characters
Hello Alexander Couzens, Patrick Rudolph, Julius Werner, Angel Pons, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#4).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport. There is no license file in the ACPI files, hence the build error.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Does not work yet: * S3 resume * PS/2 * Graphics
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 16 files changed, 588 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/4
Hello Alexander Couzens, Patrick Rudolph, Julius Werner, Angel Pons, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#5).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport. There is no license file in the ACPI files, hence the build error.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Does not work yet: * S3 resume * PS/2 * Graphics
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 16 files changed, 588 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/5
Hello Alexander Couzens, Patrick Rudolph, Julius Werner, Angel Pons, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#6).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport. There is no license file in the ACPI files, hence the build error.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Does not work yet: * S3 resume * PS/2 * Graphics
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 16 files changed, 636 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/6
Hello Alexander Couzens, Patrick Rudolph, Julius Werner, Angel Pons, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#7).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport. There is no license file in the ACPI files, hence the build error.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Does not work yet: * S3 resume * PS/2 * Graphics
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 16 files changed, 635 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/7
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
Patch Set 7:
(7 comments)
https://review.coreboot.org/#/c/32346/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32346/7//COMMIT_MSG@15 PS7, Line 15: SCH5636 There's an available datasheet online, maybe you can try to add support for it once you get video to work?
https://review.coreboot.org/#/c/32346/7//COMMIT_MSG@18 PS7, Line 18: * S3 resume Maybe depends on SuperIO, or DRAM reset gate GPIO is wrong.
https://review.coreboot.org/#/c/32346/7//COMMIT_MSG@19 PS7, Line 19: * PS/2 Should work once proper SuperIO support is added.
https://review.coreboot.org/#/c/32346/7//COMMIT_MSG@20 PS7, Line 20: * Graphics For the iGPU: Currently you don't have libgfxinit hooked up, and the int15 handler for the VBIOS seems to use incorrect parameters (LVDS?). I highly recommend hooking up libgfxinit, check https://review.coreboot.org/c/coreboot/+/21861 as a reference. Not sure of what your board has, but ports can be: DP1, DP2, DP3, HDMI1, HDMI2, HDMI3, Analog. Yes, it says it isn't working, but the patch I linked shows the necessary changes to hook libgfxinit up.
For any external PCIe GPUs: All of your PCIe ports are disabled in the devicetree. Please test which ones should be enabled: enable all of them, put a device on each physical slot and check which device in the devicetree corresponds to that slot, then disable any unused ports.
https://review.coreboot.org/#/c/32346/7/src/mainboard/fujitsu/esprimo_e900/a... File src/mainboard/fujitsu/esprimo_e900/acpi_tables.c:
https://review.coreboot.org/#/c/32346/7/src/mainboard/fujitsu/esprimo_e900/a... PS7, Line 31: // the lid is open by default. : gnvs->lids = 1; Please remove, there's no lid.
https://review.coreboot.org/#/c/32346/7/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/devicetree.cb:
https://review.coreboot.org/#/c/32346/7/src/mainboard/fujitsu/esprimo_e900/d... PS7, Line 19: device pci 01.0 off end # PCIe Bridge for discrete graphics This is the PEG (PCI Express Graphics) port, it's a x16 port connected to the northbridge (CPU)
https://review.coreboot.org/#/c/32346/7/src/mainboard/fujitsu/esprimo_e900/d... PS7, Line 39: device pci 1c.0 off end # PCIe Port #1 : device pci 1c.1 off end # PCIe Port #2 : device pci 1c.2 off end # PCIe Port #3 : device pci 1c.3 off end # PCIe Port #4 : device pci 1c.4 off end # PCIe Port #5 : device pci 1c.5 off end # PCIe Port #6 : device pci 1c.6 off end # PCIe Port #7 : device pci 1c.7 off end # PCIe Port #8 These are the southbridge PCIe ports.
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#8).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 17 files changed, 661 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/8
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
Patch Set 8: Code-Review+1
(5 comments)
I would focus on the SuperIO now.
https://review.coreboot.org/#/c/32346/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32346/8//COMMIT_MSG@17 PS8, Line 17: Graphics Nice! Is this the iGPU, a PCIe dGPU or both?
If using the iGPU, which ports are tested?
https://review.coreboot.org/#/c/32346/8//COMMIT_MSG@22 PS8, Line 22: You may want to extend the two previous sections and specify what is not tested.
https://review.coreboot.org/#/c/32346/8/src/mainboard/fujitsu/esprimo_e900/d... File src/mainboard/fujitsu/esprimo_e900/devicetree.cb:
https://review.coreboot.org/#/c/32346/8/src/mainboard/fujitsu/esprimo_e900/d... PS8, Line 39: device pci 1c.0 on end # PCIe Port #1 : device pci 1c.1 on end # PCIe Port #2 : device pci 1c.2 on end # PCIe Port #3 : device pci 1c.3 on end # PCIe Port #4 : device pci 1c.4 on end # PCIe Port #5 : device pci 1c.5 on end # PCIe Port #6 : device pci 1c.6 on end # PCIe Port #7 : device pci 1c.7 on end # PCIe Port #8 If you can, please use lspci to identify what these are connected to.
https://review.coreboot.org/#/c/32346/8/src/mainboard/fujitsu/esprimo_e900/d... PS8, Line 48: device pci 1e.0 on end # PCI bridge This should be the PCI port the board has (if it has any), does it work?
https://review.coreboot.org/#/c/32346/8/src/mainboard/fujitsu/esprimo_e900/g... File src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads:
https://review.coreboot.org/#/c/32346/8/src/mainboard/fujitsu/esprimo_e900/g... PS8, Line 22: DVI-I I see there's a DisplayPort connector, maybe you want to enable DP1, DP2 and DP3 just in case.
Also, since DVI-I has both DVI and VGA, you would want to enable Analog as well.
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#9).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c 17 files changed, 678 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/9
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#10).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c A src/superio/smsc/sch5636/Kconfig A src/superio/smsc/sch5636/Makefile.inc A src/superio/smsc/sch5636/early_serial.c A src/superio/smsc/sch5636/sch5636.h A src/superio/smsc/sch5636/sch5636_early_init.c A src/superio/smsc/sch5636/superio.c 23 files changed, 940 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/10
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#11).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c A src/superio/smsc/sch5636/Kconfig A src/superio/smsc/sch5636/Makefile.inc A src/superio/smsc/sch5636/acpi/superio.asl A src/superio/smsc/sch5636/early_serial.c A src/superio/smsc/sch5636/sch5636.h A src/superio/smsc/sch5636/sch5636_early_init.c A src/superio/smsc/sch5636/superio.c 24 files changed, 1,185 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/11
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#12).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c A src/superio/smsc/sch5636/Kconfig A src/superio/smsc/sch5636/Makefile.inc A src/superio/smsc/sch5636/acpi/superio.asl A src/superio/smsc/sch5636/early_serial.c A src/superio/smsc/sch5636/sch5636.h A src/superio/smsc/sch5636/sch5636_early_init.c A src/superio/smsc/sch5636/superio.c 24 files changed, 1,185 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/12
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#13).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c A src/superio/smsc/sch5636/Kconfig A src/superio/smsc/sch5636/Makefile.inc A src/superio/smsc/sch5636/acpi/superio.asl A src/superio/smsc/sch5636/early_serial.c A src/superio/smsc/sch5636/sch5636.h A src/superio/smsc/sch5636/sch5636_early_init.c A src/superio/smsc/sch5636/superio.c 24 files changed, 1,185 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/13
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#14).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c A src/superio/smsc/sch5636/Kconfig A src/superio/smsc/sch5636/Makefile.inc A src/superio/smsc/sch5636/acpi/superio.asl A src/superio/smsc/sch5636/early_serial.c A src/superio/smsc/sch5636/sch5636.h A src/superio/smsc/sch5636/sch5636_early_init.c A src/superio/smsc/sch5636/superio.c 24 files changed, 1,187 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/14
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32346 )
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
Patch Set 14:
(2 comments)
https://review.coreboot.org/#/c/32346/14/src/superio/smsc/sch5636/acpi/super... File src/superio/smsc/sch5636/acpi/superio.asl:
https://review.coreboot.org/#/c/32346/14/src/superio/smsc/sch5636/acpi/super... PS14, Line 103: SCH5147_SHOW_UARTA This looks wrong
https://review.coreboot.org/#/c/32346/14/src/superio/smsc/sch5636/early_seri... File src/superio/smsc/sch5636/early_serial.c:
https://review.coreboot.org/#/c/32346/14/src/superio/smsc/sch5636/early_seri... PS14, Line 49: smscsuperio_enable_serial sch5636_enable_serial
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, Julius Werner, Tristan Corrick, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32346
to look at the new patch set (#15).
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
[WIP]mb/fujitsu: add Esprimo E900
The sources are autogenerated with autoport.
Chipset/processor: i5-2400 @ 3.1GHz Kernel: 4.18 Payload: SeaBIOS SuperIO: SMSC SCH5636
Works: * Graphics
Does not work yet: * S3 resume * PS/2
Change-Id: I9e1cdb7cf047d17b2e47a2df26eabbb1593d3a8b Signed-off-by: Eloy Degen degeneloy@gmail.com --- A src/mainboard/fujitsu/Kconfig A src/mainboard/fujitsu/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Kconfig A src/mainboard/fujitsu/esprimo_e900/Kconfig.name A src/mainboard/fujitsu/esprimo_e900/Makefile.inc A src/mainboard/fujitsu/esprimo_e900/acpi/ec.asl A src/mainboard/fujitsu/esprimo_e900/acpi/platform.asl A src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl A src/mainboard/fujitsu/esprimo_e900/acpi_tables.c A src/mainboard/fujitsu/esprimo_e900/board_info.txt A src/mainboard/fujitsu/esprimo_e900/devicetree.cb A src/mainboard/fujitsu/esprimo_e900/dsdt.asl A src/mainboard/fujitsu/esprimo_e900/gma-mainboard.ads A src/mainboard/fujitsu/esprimo_e900/gpio.c A src/mainboard/fujitsu/esprimo_e900/hda_verb.c A src/mainboard/fujitsu/esprimo_e900/mainboard.c A src/mainboard/fujitsu/esprimo_e900/romstage.c A src/superio/smsc/sch5636/Kconfig A src/superio/smsc/sch5636/Makefile.inc A src/superio/smsc/sch5636/acpi/superio.asl A src/superio/smsc/sch5636/early_serial.c A src/superio/smsc/sch5636/sch5636.h A src/superio/smsc/sch5636/sch5636_early_init.c A src/superio/smsc/sch5636/superio.c 24 files changed, 1,188 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/32346/15
Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32346?usp=email )
Change subject: [WIP]mb/fujitsu: add Esprimo E900 ......................................................................
Abandoned
This patch has not been touched in over 12 months. Anyone who wants to take over work on this patch, please feel free to restore it and do any work needed to get it merged. If you create a new patch based on this work, please credit the original author.
-
Angel Pons (Code Review) -
build bot (Jenkins) (Code Review)
-
Eloy (Code Review)
-
Martin L Roth (Code Review)
-
Paul Menzel (Code Review)