Name of user not set #1002358 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33236
Change subject: src/cpu/x86 STM Support ......................................................................
src/cpu/x86 STM Support
STM initialization
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb --- M src/cpu/x86/mp_init.c 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/1
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 3889c7d..881d8a2 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -37,8 +37,12 @@ #include <symbols.h> #include <thread.h>
+#include <security/intel/stm/StmApi.h> + #define MAX_APIC_IDS 256
+extern int LoadStmImage(uint32_t mseg); + struct mp_callback { void (*func)(void *); void *arg; @@ -823,6 +827,10 @@ { size_t smm_save_state_size = mp_state.smm_save_state_size;
+#ifdef CONFIG_STM + uint32_t mseg; +#endif + /* Do nothing if SMM is disabled.*/ if (!is_smm_enabled()) return; @@ -839,6 +847,14 @@ printk(BIOS_ERR, "Unable to install SMM permanent handler.\n"); smm_disable(); } +#ifdef CONFIG_STM + + /* Calculate mseg location*/ + mseg = mp_state.perm_smbase + (mp_state.perm_smsize - CONFIG_MSEG_SIZE); + + /* Load the STM into the MSEG */ + LoadStmImage(mseg); +#endif
/* Ensure the SMM handlers hit DRAM before performing first SMI. */ wbinvd(); @@ -1023,6 +1039,15 @@ if (ops->get_smm_info != NULL) ops->get_smm_info(&state->perm_smbase, &state->perm_smsize, &state->smm_save_state_size); +#ifdef CONFIG_STM + + /* Currently, the CPU SMM save state size is based on a simplistic + * algorithm. (set it to 1K) + * note: In the future, this will need to handle newer x86 processors + * that require 32k alignment of the save state on 32K boundries.*/ + state->smm_save_state_size += (sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) + 0x1000) & 0xfffff000; + +#endif /* CONFIG_STM */
/* * Default to smm_initiate_relocation() if trigger callback isn't
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: src/cpu/x86 STM Support ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1046 PS1, Line 1046: * note: In the future, this will need to handle newer x86 processors trailing whitespace
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1048 PS1, Line 1048: state->smm_save_state_size += (sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) + 0x1000) & 0xfffff000; line over 80 characters
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: src/cpu/x86 STM Support ......................................................................
Patch Set 1:
(6 comments)
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@4 PS1, Line 4: EugeneDMyers Eugene D Myers
git commit --amend --author="Eugene D Myers cedarhouse1@comcast.net"
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@7 PS1, Line 7: src/cpu/x86 STM Support Please use:
cpu/x86: Add STM support
See `git log --oneline` how summaries should be done.
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@9 PS1, Line 9: STM initialization Please elaborate.
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@11 PS1, Line 11: Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Please add your Signed-off-by line below.
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1047 PS1, Line 1047: * that require 32k alignment of the save state on 32K boundries.*/ Please add a space before `*/`.
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1044 PS1, Line 1044: /* Currently, the CPU SMM save state size is based on a simplistic : * algorithm. (set it to 1K) : * note: In the future, this will need to handle newer x86 processors : * that require 32k alignment of the save state on 32K boundries.*/ Please see the coding style about how to format multi-line comments.
/* * … * /
or for concise style:
/* … … */
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: src/cpu/x86 STM Support ......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@44 PS1, Line 44: extern int LoadStmImage(uint32_t mseg); don't use extern
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@831 PS1, Line 831: uint32_t mseg; uintptr_t
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1042 PS1, Line 1042: #ifdef CONFIG_STM no need for preprocessor directives
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1048 PS1, Line 1048: state->smm_save_state_size += (sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) + 0x1000) & 0xfffff000; use one of the macros: ALIGN_UP and ALIGN_DOWN
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Setup - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D Myers cedarhouse1@comcast.net --- M src/cpu/x86/mp_init.c 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/33236/2/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/2/src/cpu/x86/mp_init.c@854 PS2, Line 854: LoadStmImage(mseg); trailing whitespace
https://review.coreboot.org/#/c/33236/2/src/cpu/x86/mp_init.c@1045 PS2, Line 1045: state->smm_save_state_size += trailing whitespace
Hello build bot (Jenkins),
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Setup - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D Myers cedarhouse1@comcast.net --- M src/cpu/x86/mp_init.c 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/3
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I'd like you to reexamine a change. Please visit
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Setup - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D Myers cedarhouse1@comcast.net --- M src/cpu/x86/mp_init.c 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/5
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 6:
(11 comments)
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@4 PS1, Line 4: EugeneDMyers
Eugene D Myers […]
Done
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@7 PS1, Line 7: src/cpu/x86 STM Support
Please use: […]
Done
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@9 PS1, Line 9: STM initialization
Please elaborate.
Done
https://review.coreboot.org/#/c/33236/1//COMMIT_MSG@11 PS1, Line 11: Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb
Please add your Signed-off-by line below.
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@44 PS1, Line 44: extern int LoadStmImage(uint32_t mseg);
don't use extern
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@831 PS1, Line 831: uint32_t mseg;
uintptr_t
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1042 PS1, Line 1042: #ifdef CONFIG_STM
no need for preprocessor directives
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1044 PS1, Line 1044: /* Currently, the CPU SMM save state size is based on a simplistic : * algorithm. (set it to 1K) : * note: In the future, this will need to handle newer x86 processors : * that require 32k alignment of the save state on 32K boundries.*/
Please see the coding style about how to format multi-line comments. […]
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1047 PS1, Line 1047: * that require 32k alignment of the save state on 32K boundries.*/
Please add a space before `*/`.
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1044 PS1, Line 1044: /* Currently, the CPU SMM save state size is based on a simplistic : * algorithm. (set it to 1K) : * note: In the future, this will need to handle newer x86 processors : * that require 32k alignment of the save state on 32K boundries.*/
Done
Done
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1048 PS1, Line 1048: state->smm_save_state_size += (sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) + 0x1000) & 0xfffff000;
use one of the macros: ALIGN_UP and ALIGN_DOWN
Done
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/1/src/cpu/x86/mp_init.c@1042 PS1, Line 1042: #ifdef CONFIG_STM
Done
Sorry, I should have been more precise: In coreboot we generally use if(CONFIG(STM)) { over #if CONFIG(STM). That allows to compile all code regardless of the Kconfig settings and the linker will remove the dead code anyway.
it applies to all commits and all files and all occurences
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 10:
(2 comments)
Can this be squashed into the other commits?
How can this be tested? With QEMU?
https://review.coreboot.org/#/c/33236/10//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33236/10//COMMIT_MSG@7 PS10, Line 7: cpu/x86: Add STM Support Please use only one space after the colon.
https://review.coreboot.org/#/c/33236/10/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/10/src/cpu/x86/mp_init.c@1041 PS10, Line 1041: /* Currently, the CPU SMM save state size is based on a simplistic : * algorithm. (set it to 1K) : * note: In the future, this will need to handle newer x86 processors : * that require 32k alignment of the save state on 32K boundries. */ Please reformat to use the comment style described in the coding style.
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 10:
(3 comments)
https://review.coreboot.org/#/c/33236/10//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33236/10//COMMIT_MSG@7 PS10, Line 7: cpu/x86: Add STM Support
Please use only one space after the colon.
Done
https://review.coreboot.org/#/c/33236/10/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/#/c/33236/10/src/cpu/x86/mp_init.c@1041 PS10, Line 1041: /* Currently, the CPU SMM save state size is based on a simplistic : * algorithm. (set it to 1K) : * note: In the future, this will need to handle newer x86 processors : * that require 32k alignment of the save state on 32K boundries. */
Done
Done
https://review.coreboot.org/#/c/33236/10/src/cpu/x86/mp_init.c@1041 PS10, Line 1041: /* Currently, the CPU SMM save state size is based on a simplistic : * algorithm. (set it to 1K) : * note: In the future, this will need to handle newer x86 processors : * that require 32k alignment of the save state on 32K boundries. */
Please reformat to use the comment style described in the coding style.
Done
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c M src/include/cpu/x86/msr.h 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/11
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c M src/include/cpu/x86/msr.h 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/14
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/16
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I'd like you to reexamine a change. Please visit
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 27 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/17
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 17:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33236/17/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/c/coreboot/+/33236/17/src/cpu/x86/mp_init.c@747 PS17, Line 747: if (CONFIG(STM)) that open brace { should be on the previous line
https://review.coreboot.org/c/coreboot/+/33236/17/src/cpu/x86/mp_init.c@1039 PS17, Line 1039: ALIGN_UP(sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR), trailing whitespace
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 26 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/18
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 18:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33236/18/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/c/coreboot/+/33236/18/src/cpu/x86/mp_init.c@1040 PS18, Line 1040: ALIGN_UP(sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR), trailing whitespace
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 19:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33236/19/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/c/coreboot/+/33236/19/src/cpu/x86/mp_init.c@1038 PS19, Line 1038: ALIGN_UP(sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR), trailing whitespace
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/20
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Patch Set 20:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33236/20/src/cpu/x86/mp_init.c File src/cpu/x86/mp_init.c:
https://review.coreboot.org/c/coreboot/+/33236/20/src/cpu/x86/mp_init.c@1045 PS20, Line 1045: ALIGN_UP(sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR), trailing whitespace
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/21
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/22
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: cpu/x86: Add STM Support ......................................................................
cpu/x86: Add STM Support
STM Set up - The STM needs to be loaded into the MSEG during BIOS initialization and the SMM Monitor Control MSR be set to indicate that an STM is in the system.
Change-Id: I3a0adcefc0f6e22a9da5fe53952481a77737e5eb Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/mp_init.c 1 file changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33236/23
Name of user not set #1002358 has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33236 )
Change subject: cpu/x86: Add STM Support ......................................................................
Abandoned
Squashed into CL #33234