Hello Kevin Chiu,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/33552
to review the following change.
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI
BUG=b:134912735 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: I6ad8e5aa52f503121b10fe353e4bf4021aee2061 Signed-off-by: Kevin Chiu Kevin.Chiu@quantatw.com --- M src/mainboard/google/octopus/variants/garg/gpio.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/33552/1
diff --git a/src/mainboard/google/octopus/variants/garg/gpio.c b/src/mainboard/google/octopus/variants/garg/gpio.c index a436240..8467846 100644 --- a/src/mainboard/google/octopus/variants/garg/gpio.c +++ b/src/mainboard/google/octopus/variants/garg/gpio.c @@ -22,6 +22,9 @@ static const struct pad_config default_override_table[] = { PAD_NC(GPIO_104, UP_20K),
+ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_DDC_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_DDC_SCL */ + /* EN_PP3300_TOUCHSCREEN */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD),
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/33552/1/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/1/src/mainboard/google/octopus/variant... PS1, Line 25: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_DDC_SDA */ line over 96 characters
https://review.coreboot.org/#/c/33552/1/src/mainboard/google/octopus/variant... PS1, Line 26: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_DDC_SCL */ line over 96 characters
Hello Kevin Chiu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33552
to look at the new patch set (#2).
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI
BUG=b:134912735 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: I6ad8e5aa52f503121b10fe353e4bf4021aee2061 Signed-off-by: Kevin Chiu Kevin.Chiu@quantatw.com --- M src/mainboard/google/octopus/variants/garg/gpio.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/33552/2
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1, Referring to glkrvp, the cfg is [1], so would like to double confirm here?
[1] PAD_CFG_NF_IOSSTATE(GPIO_126, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI1_DDC_SDA*/
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
Referring to glkrvp, the cfg is [1], so would like to double confirm here? […]
Hi Marco, daughter board has 2.2K PU 3.3V, it should be fine without internal weak pu 20K but I'll check to Intel for this. thanks.
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
Hi Marco, […]
if you have external PU, the internal PU is just to make the PU capability stronger. Thanks.
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
if you have external PU, the internal PU is just to make the PU capability stronger. […]
Thanks Kane.
Hi Marco, since we already have external PU 2.2K and it's strong enough to have 3.3V PU. is it ok to you? thank you!
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2: Code-Review+1
Hi Kane and Kevin, thanks for the clarification and I am good for it.
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
Thanks Kane. […]
Hi Kevin Chiu, I'm sorry. it just occurred to me. Can you check w/ HW team and see if there is any level shift for 1.8V to 3.3V?
If there is a level shift, I'm not sure pu at 3.3v will also pu at 1.8v side can you go double confirm w/ your HW team.
sorry about this.
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
Hi Kevin Chiu, […]
From fit_config.xml, it looks like DDI1 are configured as 3.3v not 1.8v?
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
From fit_config.xml, it looks like DDI1 are configured as 3.3v not 1. […]
Hi Kane, Marco, from schematic, R0411/R0410 2.2K resistor are wired to PP3300 directly, not made by level shift from 1.8V. thanks.
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
Hi Kane, Marco, […]
thanks for clarifying
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
Hi reviewers, any recommendation for this CL? thank you!
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
Hi Furquan and Karthik,
May I have your support to review the CL here? Thanks.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
thanks for clarifying
What about the cases where DB is not connected. Are internal pulls required for that case?
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
What about the cases where DB is not connected. […]
Sorry, what is DB? HDMI cable? if nothing is connected, the external PU should still keep the bus high.
If Quanta wants to use IPU+ external PU, it will make PU stronger. Pls make sure all signal integrity meets spec.
thanks.
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
What about the cases where DB is not connected. […]
Hi Furquan, Kane, for type-C DB, there is no external PU on DB so internal PU 20K might be needed but we'll check whether there is any impact if sets internal PU 20K for HDMI DB. otherwise maybe we need to override GPIO for different sku. thanks.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33552/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33552/2//COMMIT_MSG@8 PS2, Line 8: Please add the motivation. Why do you need to override it?
Hello Aaron Durbin, Sheng-Liang Pan, Karthik Ramasubramanian, Justin TerAvest, Marco Chen, Kane Chen, Kevin Chiu, build bot (Jenkins), Keith Tzeng, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33552
to look at the new patch set (#3).
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI
garg 2A2C DB: SKU ID - 1 garg HDMI DB: SKU ID - 9 garg LTE DB: SKU ID - 17
For HDMI SKU9, GPIO needs to be overriden to enable DDI1 DDC SDA/SCL.
BUG=b:134912735 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: I6ad8e5aa52f503121b10fe353e4bf4021aee2061 Signed-off-by: Kevin Chiu Kevin.Chiu@quantatw.com --- M src/mainboard/google/octopus/variants/garg/gpio.c 1 file changed, 33 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/33552/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 3:
(7 comments)
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 23: SKU_1_2A2C = 1, code indent should use tabs where possible
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 23: SKU_1_2A2C = 1, please, no spaces at the start of a line
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 24: SKU_9_HDMI = 9, code indent should use tabs where possible
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 24: SKU_9_HDMI = 9, please, no spaces at the start of a line
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 25: SKU_17_LTE = 17, code indent should use tabs where possible
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 25: SKU_17_LTE = 17, please, no spaces at the start of a line
https://review.coreboot.org/#/c/33552/3/src/mainboard/google/octopus/variant... PS3, Line 60: switch(sku_id) { space required before the open parenthesis '('
Hello Aaron Durbin, Sheng-Liang Pan, Karthik Ramasubramanian, Justin TerAvest, Marco Chen, Kane Chen, Kevin Chiu, build bot (Jenkins), Keith Tzeng, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33552
to look at the new patch set (#4).
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI
garg 2A2C DB: SKU ID - 1 garg HDMI DB: SKU ID - 9 garg LTE DB: SKU ID - 17
For HDMI SKU9, GPIO needs to be overriden to enable DDI1 DDC SDA/SCL.
BUG=b:134912735 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: I6ad8e5aa52f503121b10fe353e4bf4021aee2061 Signed-off-by: Kevin Chiu Kevin.Chiu@quantatw.com --- M src/mainboard/google/octopus/variants/garg/gpio.c 1 file changed, 33 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/33552/4
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/33552/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33552/2//COMMIT_MSG@8 PS2, Line 8:
Please add the motivation. […]
Done
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/2/src/mainboard/google/octopus/variant... PS2, Line 29: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
Hi Furquan, Kane, for type-C DB, there is no external PU on DB so internal PU 20K might be needed bu […]
override GPIO by different SKU#, on SKU1 or SKU17 w/ DB or w/o DB, GPIO126 & GPIO127 will keep 3.3V (IPU 20K).
on SKU9, w/ DB, GPIO126 as DDC SDA keeps 3.3V (EPU 2.2K), GPIO127 as DDC SCL keeps 3.3V (EPU 2.2K), HDMI function test ok.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4: Code-Review+2
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/33552/4/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/4/src/mainboard/google/octopus/variant... PS4, Line 46: DISPUPD), If we configure these two pins with internal pull up then would they be ok for DB with HDMI (external PU) and others (no PU)?
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/33552/4/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/4/src/mainboard/google/octopus/variant... PS4, Line 46: DISPUPD),
If we configure these two pins with internal pull up then would they be ok for DB with HDMI (externa […]
What does it mean by "others (no PU)"? You meant other Daughter board without PU? thanks
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/33552/4/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/garg/gpio.c:
https://review.coreboot.org/#/c/33552/4/src/mainboard/google/octopus/variant... PS4, Line 46: DISPUPD),
What does it mean by "others (no PU)"? […]
Hi Marco, for HDMI, we usually select 2.2K resistor since if it has internal PU 20K as shunt resistance. the value will decrease to 1.98K, it might have peak concern for EMI. thanks.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4: Code-Review+2
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4:
Hi reviewers, could you kindly help to merge this CL if no concern? thank you!
Justin TerAvest has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
Patch Set 4: Code-Review+2
Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33552 )
Change subject: mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI ......................................................................
mb/google/octopus: Override DDI1 DDC SDA/SCL for Garg HDMI
garg 2A2C DB: SKU ID - 1 garg HDMI DB: SKU ID - 9 garg LTE DB: SKU ID - 17
For HDMI SKU9, GPIO needs to be overriden to enable DDI1 DDC SDA/SCL.
BUG=b:134912735 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: I6ad8e5aa52f503121b10fe353e4bf4021aee2061 Signed-off-by: Kevin Chiu Kevin.Chiu@quantatw.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33552 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Justin TerAvest teravest@chromium.org --- M src/mainboard/google/octopus/variants/garg/gpio.c 1 file changed, 33 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Justin TerAvest: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/mainboard/google/octopus/variants/garg/gpio.c b/src/mainboard/google/octopus/variants/garg/gpio.c index a436240..90601ce 100644 --- a/src/mainboard/google/octopus/variants/garg/gpio.c +++ b/src/mainboard/google/octopus/variants/garg/gpio.c @@ -19,6 +19,12 @@ #include <gpio.h> #include <soc/gpio.h>
+enum { + SKU_1_2A2C = 1, + SKU_9_HDMI = 9, + SKU_17_LTE = 17, +}; + static const struct pad_config default_override_table[] = { PAD_NC(GPIO_104, UP_20K),
@@ -29,9 +35,34 @@ PAD_NC(GPIO_213, DN_20K), };
+static const struct pad_config hdmi_override_table[] = { + PAD_NC(GPIO_104, UP_20K), + + /* HV_DDI1_DDC_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, NONE, DEEP, NF1, HIZCRx1, + DISPUPD), + /* HV_DDI1_DDC_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1, + DISPUPD), + + /* EN_PP3300_TOUCHSCREEN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, + DISPUPD), + + PAD_NC(GPIO_213, DN_20K), +}; + const struct pad_config *variant_override_gpio_table(size_t *num) { - *num = ARRAY_SIZE(default_override_table); + uint32_t sku_id; + sku_id = get_board_sku();
- return default_override_table; + switch (sku_id) { + case SKU_9_HDMI: + *num = ARRAY_SIZE(hdmi_override_table); + return hdmi_override_table; + default: + *num = ARRAY_SIZE(default_override_table); + return default_override_table; + } }