Attention is currently required from: Jason Nien, Karthik Ramasubramanian, Martin L Roth, Paul Menzel.
Mark Hasemeyer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78137?usp=email )
Change subject: mb/google/guybrush: Set PS2K_IRQ to level/low
......................................................................
Patch Set 4:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78137/comment/327dfaa9_ae990c85 :
PS3, Line 12: From https://review.coreboot.org/c/coreboot/+/54924:
git operates with the hashes (74bce48f1d445053b217913df79a77dfe286e893), so I’d use that.
Done
https://review.coreboot.org/c/coreboot/+/78137/comment/90631dcc_bd8cb7f2 :
PS3, Line 13: > The default state for the IRQ lines when the eSPI controller comes
: > out of reset is high. This is because the IRQ lines are shared with
: > the other IRQ sources using AND gates. This means that in order to
: > not cause any spurious interrupts or miss any interrupts, the
: > IO-APIC must use a low polarity trigger.
Remove the trailing two spaces?
Did you mean the leading spaces? I removed them.
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