HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Fix comment ......................................................................
nb/{haswell,i945,sandybridge}: Fix comment
'e7525/northbridge.c' does not exist anymore.
Change-Id: I5520760f59a3c6f89afb1360b12bd9763fba562a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/sandybridge/northbridge.c 3 files changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/37653/1
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index c047c39..1efa660 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -92,7 +92,6 @@
/* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. */ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index dde1b11..bcecd88 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -165,7 +165,6 @@
/* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. */ static struct device_operations pci_domain_ops = { .read_resources = mch_domain_read_resources, diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 6337d69..b34f07d 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -258,7 +258,6 @@
/* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. */ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources,
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Fix comment ......................................................................
Patch Set 1: Code-Review+2
Mimoja has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Fix comment ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Fix comment ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/37653/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37653/1//COMMIT_MSG@7 PS1, Line 7: Fix comment Maybe say: `Drop outdated comment`
Hello Patrick Rudolph, Angel Pons, Mimoja, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37653
to look at the new patch set (#2).
Change subject: nb/{haswell,i945,sandybridge}: Drop outdated comment ......................................................................
nb/{haswell,i945,sandybridge}: Drop outdated comment
'e7525/northbridge.c' does not exist anymore.
Change-Id: I5520760f59a3c6f89afb1360b12bd9763fba562a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/sandybridge/northbridge.c 3 files changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/37653/2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Drop outdated comment ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37653/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37653/1//COMMIT_MSG@7 PS1, Line 7: Fix comment
Maybe say: `Drop outdated comment`
Done
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Drop outdated comment ......................................................................
Patch Set 2: Code-Review+1
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37653 )
Change subject: nb/{haswell,i945,sandybridge}: Drop outdated comment ......................................................................
nb/{haswell,i945,sandybridge}: Drop outdated comment
'e7525/northbridge.c' does not exist anymore.
Change-Id: I5520760f59a3c6f89afb1360b12bd9763fba562a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/37653 Reviewed-by: Frans Hendriks fhendriks@eltan.com Reviewed-by: Patrick Rudolph siro@das-labor.org Reviewed-by: Mimoja coreboot@mimoja.de Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/sandybridge/northbridge.c 3 files changed, 0 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved Mimoja: Looks good to me, but someone else must approve Frans Hendriks: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index c047c39..1efa660 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -92,7 +92,6 @@
/* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. */ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index dde1b11..bcecd88 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -165,7 +165,6 @@
/* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. */ static struct device_operations pci_domain_ops = { .read_resources = mch_domain_read_resources, diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 6337d69..b34f07d 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -258,7 +258,6 @@
/* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. */ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources,
-
Angel Pons (Code Review) -
Frans Hendriks (Code Review)
-
HAOUAS Elyes (Code Review)
-
Mimoja (Code Review)
-
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)