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Change subject: security/vboot: Add option for enabling ADB over network via GBB flag
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Thoughts?
I think we should not land any designs on the main branch before they are final. That's what we have the separate bring-up branch for.
I don't know what the exact situation on Fatcat is right now, but if you want to boot AL there you should still be using the bringup branch anyway(?), and if you don't then you shouldn't need this flag. (Also, all this does is configure the default that coreboot builds the image with, you can still always manually change the image with gbb_utility afterwards.)
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Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c:
https://review.coreboot.org/c/coreboot/+/85413/comment/9be58b7b_66097c18?us… :
PS7, Line 104: 0x40
Sorry for the inaccuracy.
gpio5 |= 0x40 when (force_asm1061 || (detect_pcie & PCIEX1_2_NOT_PRESENT)) stops ASM1062 Serial ATA Controller working even with no card plugged on PCIEX1_2. The cbmem log in such case is uploaded to https://ticket.coreboot.org/attachments/485 , and these are worth noticing:
> [DEBUG] PCI: 00:00:1c.3 scanning...
> [DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
> [INFO ] POST: 0x24
> [INFO ] POST: 0x25
> [INFO ] PCI: 00:00:1c.3: Setting Max_Payload_Size to 128 for devices under this root port
> [WARN ] PCI: 00:00:1c.3: Has a slow downstream device. Enumeration failed.
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Change subject: security/vboot: Add option for enabling ADB over network via GBB flag
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> See go/al-new-products-per-device for more background. AFAIU this GBB flag was only invented temporarily on the bringup branch, it was not supposed to carry over to the main branch, it's not a good long-term design and they're working on a better solution now. So we should not be landing this either here or in vboot.
Sure, looks like that design doc is still in review phase and no decision has been made. We can always revert the changes if we decide that AP FW doesn't need to set GBB to support ADB and it can be managed by OS layer by some means. Thoughts ?
At this point, everyone who is actively working on FatCat and wishing to enable ADB but without an OS console is unable to apply the GBB settings (demands to override the image GBB to enable ADB and reflash the AP FW).
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Change subject: security/vboot: Add option for enabling ADB over network via GBB flag
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> > See CL:6354379. I don't think we want this in the main branch. […]
See go/al-new-products-per-device for more background. AFAIU this GBB flag was only invented temporarily on the bringup branch, it was not supposed to carry over to the main branch, it's not a good long-term design and they're working on a better solution now. So we should not be landing this either here or in vboot.
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Hello Ben Kao, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/87033?usp=email
to look at the new patch set (#3).
Change subject: mb/var/uldrenite: Configure descriptor for either MBVR or FIVR
......................................................................
mb/var/uldrenite: Configure descriptor for either MBVR or FIVR
According to the root cause analysis in b/404126972#comment22,
Right now, it is set to FIVR, which leads to a system reboot issue
due to OVP being triggered (MBVR and FIVR existing simultaneously).
The current build's main source is MBVR, so we want to use fw_config
to dynamically adjust MFIT and MBVR with the current phase devices to
ensure consistency in client devices settings.
CONFIGURE_DESCRIPTOR is a temporary workaround for the current phase.
In the next phase, we will choose a specific setting for implementation.
If there are any concerns, it can be removed in the next phase.
BUG=b:404126972
TEST=boot to ChromeOS
Change-Id: I337574c8c55889ceb49b9f33625feadb48bd8890
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/uldrenite/Makefile.mk
M src/mainboard/google/brya/variants/uldrenite/variant.c
3 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/87033/3
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Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c:
https://review.coreboot.org/c/coreboot/+/85413/comment/83bc9427_d3913fa3?us… :
PS7, Line 104: 0x40
> I have been looking at the magic values of 0x20/0x40/0x70, but after digging through vendor BIOS, lo […]
It hardly makes any difference. The cbmem and autoport dump when a card is present at PCIEX1_2 is uploaded to https://ticket.coreboot.org/attachments/download/484/autoport-p8z77v-gb83fa… .
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Change subject: mb/google/fatcat/var/francka: Update HDA verb tables
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/fatcat/var/francka: Update HDA verb tables
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Patch Set 1: Code-Review+1
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Change subject: mb/google/fatcat/var/francka: Update HDA verb tables
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Patch Set 1: Code-Review+2
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