coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: vc/intel/fsp/twinlake: Update FSP headers from v5222.01 to v5293.00
by Varun Upadhyay (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Ronak Kanabar. Varun Upadhyay has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/86591?usp=email ) Change subject: vc/intel/fsp/twinlake: Update FSP headers from v5222.01 to v5293.00 ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/86591?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6e0bd39addf9f6d48b27748678c70f54abd79cbe Gerrit-Change-Number: 86591 Gerrit-PatchSet: 1 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 08:04:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization
by Subrata Banik (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86514?usp=email ) Change subject: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86514/comment/815ab3c0_c6d15984?us… : PS6, Line 11: can you please highlight that you have add 150ms delay before powering off the WWAN? File src/mainboard/google/brya/variants/uldrenite/gpio.c: https://review.coreboot.org/c/coreboot/+/86514/comment/b756835b_f71d3faf?us… : PS6, Line 236: /* F13 : NC ==> PLTRST_WWAN# */ : PAD_CFG_GPO(GPP_F13, 1, DEEP), can u move this into romstage as well ? then you don't need to reconfigure the same GPIOs in ramstage -- To view, visit https://review.coreboot.org/c/coreboot/+/86514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie01019eca7eaa4bbb34dd80aeb65b9b6b08587fd Gerrit-Change-Number: 86514 Gerrit-PatchSet: 6 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 25 Feb 2025 07:47:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization
by John Su (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. John Su has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86514?usp=email ) Change subject: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Would the reviewers help review this CL? This is to confirm the measured WWAN power sequence. -- To view, visit https://review.coreboot.org/c/coreboot/+/86514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie01019eca7eaa4bbb34dd80aeb65b9b6b08587fd Gerrit-Change-Number: 86514 Gerrit-PatchSet: 6 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 25 Feb 2025 07:43:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/trulo: Update GPIO wake pins
by Subrata Banik (Code Review) 25 Feb '25

25 Feb '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86555?usp=email ) Change subject: mb/google/trulo: Update GPIO wake pins ...................................................................... mb/google/trulo: Update GPIO wake pins List of changes - 1. Make GPP_B3 IRQ only pin. 2. Remove redundant GPE option from touchpad device. BUG=b:397905085 TEST=Verified wake from S0ix using touchpad. Change-Id: I055a60476e4a37bf74940802157bb9cd30bac3c4 Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86555 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jayvik Desai <jayvik(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/trulo/gpio.c M src/mainboard/google/brya/variants/trulo/overridetree.cb 2 files changed, 1 insertion(+), 2 deletions(-) Approvals: Eric Lai: Looks good to me, approved Subrata Banik: Looks good to me, approved Jayvik Desai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/trulo/gpio.c b/src/mainboard/google/brya/variants/trulo/gpio.c index 3ccc54a..fb805d6 100644 --- a/src/mainboard/google/brya/variants/trulo/gpio.c +++ b/src/mainboard/google/brya/variants/trulo/gpio.c @@ -58,7 +58,7 @@ /* B2 : NC */ PAD_NC(GPP_B2, NONE), /* B3 : CPU_GP2 ==> EC_TP_INT */ - PAD_CFG_GPI_IRQ_WAKE(GPP_B3, NONE, PWROK, LEVEL, INVERT), + PAD_CFG_GPI_APIC(GPP_B3, NONE, PWROK, LEVEL, INVERT), /* B4 : PROC_GP3 ==> EN_PP3300_UCAM_X */ PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), /* B5 : GPP_B5 ==> ISH_I2C0_SCL */ diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb index cdc777b..4c21173 100644 --- a/src/mainboard/google/brya/variants/trulo/overridetree.cb +++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb @@ -455,7 +455,6 @@ register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B3_IRQ)" - register "wake" = "GPE0_DW1_03" register "detect" = "1" device i2c 15 on end end -- To view, visit https://review.coreboot.org/c/coreboot/+/86555?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I055a60476e4a37bf74940802157bb9cd30bac3c4 Gerrit-Change-Number: 86555 Gerrit-PatchSet: 4 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/trulo: Lock GPIO pad configuration for GPP_F17
by Subrata Banik (Code Review) 25 Feb '25

25 Feb '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86579?usp=email ) Change subject: mb/google/trulo: Lock GPIO pad configuration for GPP_F17 ...................................................................... mb/google/trulo: Lock GPIO pad configuration for GPP_F17 BUG=b:397905085 TEST=Make sure that GPP_F17 pad configuration is locked. Change-Id: I9211ac70539d251746332448691d22b454bc6a2b Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86579 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Jayvik Desai <jayvik(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/brya/variants/trulo/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Jayvik Desai: Looks good to me, approved Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/trulo/gpio.c b/src/mainboard/google/brya/variants/trulo/gpio.c index c813154..3ccc54a 100644 --- a/src/mainboard/google/brya/variants/trulo/gpio.c +++ b/src/mainboard/google/brya/variants/trulo/gpio.c @@ -242,7 +242,7 @@ /* F16 : NC */ PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG), /* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */ - PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, PWROK, EDGE_SINGLE, INVERT), + PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, EDGE_SINGLE, INVERT, LOCK_CONFIG), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG), /* F19 : Not available */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86579?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9211ac70539d251746332448691d22b454bc6a2b Gerrit-Change-Number: 86579 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add early low-battery shutdown during memory init
by Kapil Porwal (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Julius Werner, Karthik Ramasubramanian, Ronak Kanabar. Kapil Porwal has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86452?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: drivers/intel/fsp2_0: Add early low-battery shutdown during memory init ...................................................................... Patch Set 7: (1 comment) File src/drivers/intel/fsp2_0/memory_init.c: https://review.coreboot.org/c/coreboot/+/86452/comment/818ed33a_f855ccd0?us… : PS7, Line 349: /* User has been notified of low battery; safe to power off. */ Move it to just before power-off call at line#352. -- To view, visit https://review.coreboot.org/c/coreboot/+/86452?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia135b238d1e16722c2ca8d3b461e83b4ce513adf Gerrit-Change-Number: 86452 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 07:33:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Save HW protect temperature to SRAM
by Yidi Lin (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86551?usp=email ) Change subject: soc/mediatek/mt8196: Save HW protect temperature to SRAM ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: gentle ping -- To view, visit https://review.coreboot.org/c/coreboot/+/86551?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib714c297871132907e286536c4b3aea1532f3869 Gerrit-Change-Number: 86551 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 07:28:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Adjust thermal trip point parameters
by Yidi Lin (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Zhaoqing Jiu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86552?usp=email ) Change subject: soc/mediatek/mt8196: Adjust thermal trip point parameters ...................................................................... Patch Set 3: Code-Review-1 (1 comment) Patchset: PS3: Don't edit the commit message from gerrit UI. -- To view, visit https://review.coreboot.org/c/coreboot/+/86552?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7361edd7f75b82fff4241ec94488ed1ef07346f Gerrit-Change-Number: 86552 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 07:28:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update SSPM firmware to v5.0
by Yidi Lin (Code Review) 25 Feb '25

25 Feb '25

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/blobs/+/86586?usp=email ) Change subject: soc/mediatek/mt8196: Update SSPM firmware to v5.0 ...................................................................... soc/mediatek/mt8196: Update SSPM firmware to v5.0 Update sspm.bin to set USB reg to reduce ldm delay time and solve USB audio and video problems. BRANCH=rauru TEST=Build pass and usb 3.0 camera is working properly BUG=b:361690180,b:371733874 Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Signed-off-by: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/sspm.bin M soc/mediatek/mt8196/sspm.bin.md5 M soc/mediatek/mt8196/sspm_release_notes.txt 3 files changed, 5 insertions(+), 1 deletion(-) Approvals: Yu-Ping Wu: Verified; Looks good to me, approved Yidi Lin: Looks good to me, approved diff --git a/soc/mediatek/mt8196/sspm.bin b/soc/mediatek/mt8196/sspm.bin index 09cd109..ce12d69 100644 --- a/soc/mediatek/mt8196/sspm.bin +++ b/soc/mediatek/mt8196/sspm.bin Binary files differ diff --git a/soc/mediatek/mt8196/sspm.bin.md5 b/soc/mediatek/mt8196/sspm.bin.md5 index 4c26a59..b4dd13f 100644 --- a/soc/mediatek/mt8196/sspm.bin.md5 +++ b/soc/mediatek/mt8196/sspm.bin.md5 @@ -1 +1 @@ -1cf19f35ed264ad1331309c33c49ff25 *sspm.bin +4119695be57988065a3c4af20cc927c1 *sspm.bin diff --git a/soc/mediatek/mt8196/sspm_release_notes.txt b/soc/mediatek/mt8196/sspm_release_notes.txt index 460db02..1341579 100644 --- a/soc/mediatek/mt8196/sspm_release_notes.txt +++ b/soc/mediatek/mt8196/sspm_release_notes.txt @@ -1,5 +1,9 @@ ** Build from MediaTek Internal ** +# Version 5.0 +1. Update sspm.bin to set USB reg to reduce ldm delay time and solve USB +audio and video issues. + # Version 4.0 1. Update sspm.bin to fix EMI unmap register issue and make syetem fully sleep. -- To view, visit https://review.coreboot.org/c/blobs/+/86586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Gerrit-Change-Number: 86586 Gerrit-PatchSet: 5 Gerrit-Owner: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com>

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[S] Change in coreboot[main]: soc/intel/pantherlake: Display Sign-of-Life during memory training
by Kapil Porwal (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Jeremy Compostella, Julius Werner, Jérémy Compostella, Karthik Ramasubramanian, Paul Menzel, Pranava Y N, Subrata Banik, Vikrant L Jadeja. Kapil Porwal has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85454?usp=email ) Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training ...................................................................... Patch Set 22: Code-Review+2 (1 comment) Patchset: PS22: LGTM as the request for common eSOL init code is being tracked at b/398872610 -- To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367 Gerrit-Change-Number: 85454 Gerrit-PatchSet: 22 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 07:25:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit February 2025