coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP
by hualin wei (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik. hualin wei has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86554?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/brya/variants/pujjoniru/include/… [View More]

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[S] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP
by hualin wei (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, hualin wei. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86554?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+1 by Jayvik Desai, Code-… [View More]Review+1 by Qinghong Zeng, Verified+1 by build bot (Jenkins) Change subject: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP ...................................................................... mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP According to the circuit schematic diagram, pujjoniru uses GPP_E17 as a write-protected gpio,so it is necessary to add the GPIO_PCH_WP definition for GPP_E17 in gpio.h. Duo to cros_gpios under variants/baseboard/nissa/gpio.c will call GPIO_PCH_WP under variants/baseboard/nissa/include/baseboard/gpio.h, causing our modifications to not take effect. In order to achieve the above modification, we follow brya, we modify DECLARE_CROS_GPIOS in variants/baseboard/nissa/gpio.c to DECLARE_WEAK_CROS_GPIOS, so that the cros_gpios we defined in /pujjoniru/gpio.c can overwrite variants/baseboard/nissa/gpio.c BUG=b:396594296 TEST=wp status update verified by toggling it on and off. Change-Id: Ic92ff33a5fde50a1a400043b2daba0414eb9e255 Signed-off-by: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/nissa/gpio.c M src/mainboard/google/brya/variants/pujjoniru/gpio.c M src/mainboard/google/brya/variants/pujjoniru/include/variant/gpio.h 3 files changed, 14 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/86554/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86554?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic92ff33a5fde50a1a400043b2daba0414eb9e255 Gerrit-Change-Number: 86554 Gerrit-PatchSet: 4 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> [View Less]

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Add Fn key scancode
by Eric Lai (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, hualin wei. Eric Lai has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86589?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Add Fn key scancode ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86589?usp=email To … [View More]

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[XS] Change in coreboot[main]: soc/intel/common/reset: Mark do_low_battery_poweroff with __noreturn
by Kapil Porwal (Code Review) 25 Feb '25

25 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Subrata Banik. Kapil Porwal has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86578?usp=email ) Change subject: soc/intel/common/reset: Mark do_low_battery_poweroff with __noreturn ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86578?usp=email To unsubscribe, or for help … [View More]

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[XL] Change in coreboot[main]: RFC: Add initial support for the bootguarded framework tigerlake lapt...
by Felix Singer (Code Review) 24 Feb '25

24 Feb '25

Felix Singer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/62569?usp=email ) Change subject: RFC: Add initial support for the bootguarded framework tigerlake laptop (hx20) ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/62569?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-… [View More]

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[S] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP
by Subrata Banik (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, hualin wei. Subrata Banik has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86554?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/brya/variants/pujjoniru/include/variant/gpio.h: … [View More]

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Add Fn key scancode
by Subrata Banik (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, hualin wei. Subrata Banik has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86589?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Add Fn key scancode ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86589?usp=… [View More]

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[M] Change in coreboot[main]: soc/intel/pantherlake: Inject CSE TS into CBMEM timestamp table
by Subrata Banik (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Bora Guvendik, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Wonkyu Kim. Subrata Banik has posted comments on this change by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/84872?usp=email ) Change subject: soc/intel/pantherlake: Inject CSE TS into CBMEM timestamp table ...................................................................... Patch Set 9: (1 comment) File src/soc/intel/common/block/cse/Kconfig: https://… [View More]review.coreboot.org/c/coreboot/+/84872/comment/61574e35_9e679116?us… : PS8, Line 316: _V4 > Version information comes from CSE. Currently not used, but if someone modifies the code in the future and starts checking version info, it can cause mismatch between coreboot and cse. > > /* CSE boot performance data */ > struct cse_boot_perf_rsp { > struct mkhi_hdr hdr; > > /* Data version */ > uint32_t version; https://chromium-review.googlesource.com/c/chromiumos/platform/depthcharge/… -- To view, visit https://review.coreboot.org/c/coreboot/+/84872?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie7716b8c371b82c13da1b0217dce1a16e7b95cee Gerrit-Change-Number: 84872 Gerrit-PatchSet: 9 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 05:11:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> [View Less]

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[M] Change in coreboot[main]: soc/intel/pantherlake: Inject CSE TS into CBMEM timestamp table
by Bora Guvendik (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, Wonkyu Kim. Bora Guvendik has posted comments on this change by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/84872?usp=email ) Change subject: soc/intel/pantherlake: Inject CSE TS into CBMEM timestamp table ...................................................................... Patch Set 9: (1 comment) File src/soc/intel/common/block/cse/Kconfig: https://… [View More]review.coreboot.org/c/coreboot/+/84872/comment/230fab06_c89b70cd?us… : PS8, Line 316: _V4 > > It wasn't used but I don't know the story behind it. […] Version information comes from CSE. Currently not used, but if someone modifies the code in the future and starts checking version info, it can cause mismatch between coreboot and cse. /* CSE boot performance data */ struct cse_boot_perf_rsp { struct mkhi_hdr hdr; /* Data version */ uint32_t version; -- To view, visit https://review.coreboot.org/c/coreboot/+/84872?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie7716b8c371b82c13da1b0217dce1a16e7b95cee Gerrit-Change-Number: 84872 Gerrit-PatchSet: 9 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 25 Feb 2025 04:54:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> [View Less]

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[L] Change in coreboot[main]: mb/asus: Add SABERTOOTH P67
by Riku Viitanen (Code Review) 24 Feb '25

24 Feb '25

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86484?usp=email to look at the new patch set (#5). Change subject: mb/asus: Add SABERTOOTH P67 ...................................................................... mb/asus: Add SABERTOOTH P67 New board based on autoport. One of the PCIe ports is muxed between the slot and USB 3.0 front panel header. CMOS option is implemented to select which one to connect. It … [View More]defaults to autodetect, which selects the slot if a card is present (presence detect pin is wired to a GPIO but it is ignored by vendor firmware, which only has the manual toggle). There is an additional ASUS specific coprocessor on board: a KB3720QF "TPU" which has an external 64KiB SPI flash near it for its firmware. revealed with a quick look and binwalk. On vendor firmware, this facilitates automatic overclocking, but it seems like we don't need to do anything with it at least to just boot to coreboot. It is connected to LPC and SMBus among other things. Tested: - Native raminit, i5-2500K - SeaBIOS 1.16.3 booting to Void Linux (6.12.16) - dGPU graphics - All PCIe slots - PCI slot - PCIEX1_2 / USB3_34 muxing - All SATA ports work in SeaBIOS - All rear USB ports - Ethernet - Serial - S3 resume - PS/2 keyboard OR mouse (splitter cables cant't work) - Rear line out jack - me_cleaner Untested: - eSATA - All USB headers - Firewire (just confirmed the controller shows in lspci) - CPU_LED (gpio48) Not working: - MemOK button (connected to TPU) - DRAM_LED (gpio39: on vendor FW it stays lit if there's RAM problems) - VGA_LED (gpio38: same but VGA) - BOOT_DEVICE_LED (gpio22) Change-Id: If643a9ceb944ba2a2c552202b56829b0a0c87925 Signed-off-by: Riku Viitanen <riku.viitanen(a)protonmail.com> --- A src/mainboard/asus/sabertooth_p67/Kconfig A src/mainboard/asus/sabertooth_p67/Kconfig.name A src/mainboard/asus/sabertooth_p67/Makefile.mk A src/mainboard/asus/sabertooth_p67/acpi/ec.asl A src/mainboard/asus/sabertooth_p67/acpi/platform.asl A src/mainboard/asus/sabertooth_p67/acpi/superio.asl A src/mainboard/asus/sabertooth_p67/board_info.txt A src/mainboard/asus/sabertooth_p67/cmos.default A src/mainboard/asus/sabertooth_p67/cmos.layout A src/mainboard/asus/sabertooth_p67/devicetree.cb A src/mainboard/asus/sabertooth_p67/dsdt.asl A src/mainboard/asus/sabertooth_p67/early_init.c A src/mainboard/asus/sabertooth_p67/gpio.c A src/mainboard/asus/sabertooth_p67/hda_verb.c A src/mainboard/asus/sabertooth_p67/mainboard.c 15 files changed, 576 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/86484/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86484?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If643a9ceb944ba2a2c552202b56829b0a0c87925 Gerrit-Change-Number: 86484 Gerrit-PatchSet: 5 Gerrit-Owner: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> [View Less]

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coreboot-gerrit February 2025