coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/pantherlake: Display Sign-of-Life during memory training
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Vikrant L Jadeja. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85454?usp=email ) Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training ...................................................................... Patch Set 16: (1 comment) File src/soc/intel/pantherlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/85454/comment/3b8f14c1_a069553d?us… : PS11, Line 375: > > Thank you for the detailed information. We will take it into consideration once FSP provides a mechanism that allows us to request that the VGA not be disabled. Currently, `VgaInitControl` is implemented as a simple Boolean value. It is unclear whether it will be converted back to a bit field, or if an additional UPD will be provided to manage this request. > > > note. this is not for CrOS usecase but for other mainboards in future. Therefore, i believe we have some time to enable non-cros devices marking it resolved for now until FSP provides other means to show VGA text for CSE update (romstage) -- To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367 Gerrit-Change-Number: 85454 Gerrit-PatchSet: 16 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 07:16:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[XS] Change in coreboot[main]: mb/trulo/var/uldrenite: Added Fn support and also change the Kconfig ...
by John Su (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Jayvik Desai, Kapil Porwal, Nick Vaccaro. John Su has posted comments on this change by Dtrain Hsu. ( https://review.coreboot.org/c/coreboot/+/86474?usp=email ) Change subject: mb/trulo/var/uldrenite: Added Fn support and also change the Kconfig order ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86474?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92c1bd200f1849a460943bdb96ab122d464a0f40 Gerrit-Change-Number: 86474 Gerrit-PatchSet: 6 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 07:03:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/nissa: Create meliks variant
by SH Kim (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86373?usp=email ) Change subject: mb/google/nissa: Create meliks variant ...................................................................... Patch Set 9: (2 comments) Patchset: PS6: > Jenkins was able to build on Patchset 2, but nothing special different on Patchset 6 from Patchset 2 […] Added new comment. Patchset: PS9: > Patchset8: Except `select INTEL_GMA_HAVE_VBT`: https://qa.coreboot. […] Unchecking `Resolved` on this comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/86373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff5e27ef06a44976c2724751de0f9c6d5cf6eaaf Gerrit-Change-Number: 86373 Gerrit-PatchSet: 9 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 06:24:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: SH Kim <sh_.kim(a)samsung.corp-partner.google.com>

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add early low-battery shutdown during memory init
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Ronak Kanabar. Hello Andrey Petrov, Intel coreboot Reviewers, Ronak Kanabar, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86452?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/intel/fsp2_0: Add early low-battery shutdown during memory init ...................................................................... drivers/intel/fsp2_0: Add early low-battery shutdown during memory init This commit introduces an early low-battery shutdown mechanism during FSP memory initialization. This is particularly important during firmware updates, where memory training can consume significant power and lead to abrupt shutdowns, potentially corrupting the firmware. The changes include: - Adding platform_display_early_shutdown_notification() to notify the user of the impending shutdown. - Checking platform_is_low_battery_shutdown_needed() to determine if a shutdown is necessary. - Implementing a shutdown sequence if low battery is detected during memory init, especially when no MRC cache is found (i.e. firmware update). - Deferring shutdown on systems without MAINBOARD_HAS_EARLY_LIBGFXINIT so that FSP-M (uGOP) can display a message. This prevents firmware update corruption due to low battery. BUG=b:339673254 TEST=Verified low battery boot event logging and controlled shutdown. Change-Id: Ia135b238d1e16722c2ca8d3b461e83b4ce513adf Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/drivers/intel/fsp2_0/include/fsp/api.h M src/drivers/intel/fsp2_0/memory_init.c 2 files changed, 57 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/86452/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86452?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia135b238d1e16722c2ca8d3b461e83b4ce513adf Gerrit-Change-Number: 86452 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com>

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[M] Change in coreboot[main]: mb/google/nissa: Create meliks variant
by SH Kim (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86373?usp=email ) Change subject: mb/google/nissa: Create meliks variant ...................................................................... Patch Set 9: (1 comment) Patchset: PS9: Patchset8: Except `select INTEL_GMA_HAVE_VBT`: https://qa.coreboot.org/job/coreboot-gerrit/273270/console ``` GOOGLE_MELIKS built successfully. (took 2 min 43 sec) /cb-build/coreboot-gerrit.0/gcc/abuild/GOOGLE_MELIKS.xml written to abuild-gcc.xml ``` Patchset9: Add `select INTEL_GMA_HAVE_VBT` from Patchset8: https://qa.coreboot.org/job/coreboot-gerrit/273271/console ``` GOOGLE_MELIKS build FAILED after 3 min 9 sec! Log excerpt: ASL+ Optimizing Compiler/Disassembler version 20241212 Copyright (c) 2000 - 2023 Intel Corporation coreboot toolchain v2024-12-21_306660c2de ASL Input: dsdt.asl - 98369 bytes 6103 keywords 0 source lines AML Output: dsdt.aml - 22659 bytes 5270 opcodes 833 named objects Compilation successful. 0 Errors, 0 Warnings, 42 Remarks, 8327 Optimizations, 3746 Constants Folded IASL 3150 warning types were ignored! IASL /cb-build/coreboot-gerrit.0/gcc-chromeos/GOOGLE_MELIKS/dsdt.aml disassembled correctly. make[2]: *** No rule to make target 'src/mainboard/google/brya/variants/meliks/data.vbt', needed by '/cb-build/coreboot-gerrit.0/gcc-chromeos/GOOGLE_MELIKS/coreboot.pre'. Stop. make[2]: Leaving directory '/home/coreboot/node-root/workspace/coreboot-gerrit' ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/86373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff5e27ef06a44976c2724751de0f9c6d5cf6eaaf Gerrit-Change-Number: 86373 Gerrit-PatchSet: 9 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 05:56:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/pantherlake: Skip exposing CPUJTAG at kernel
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86393?usp=email ) Change subject: soc/intel/pantherlake: Skip exposing CPUJTAG at kernel ...................................................................... soc/intel/pantherlake: Skip exposing CPUJTAG at kernel This patch prevents exposing the CPU JTAG GPIO pads. These are internal GPIO pins used for debugging the SoC and should not be configurable from the kernel pinctrl driver. TEST=Able to build and boot google/fatat. Decompile ACPI table using iasl and ensure CPUJTAG entry not present. Change-Id: I4d920acb95275fbf72b83b822eddc41829511626 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86393 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> Reviewed-by: Jayvik Desai <jayvik(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/soc/intel/pantherlake/acpi/gpio.asl M src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h 2 files changed, 8 insertions(+), 36 deletions(-) Approvals: Dinesh Gehlot: Looks good to me, approved Jayvik Desai: Looks good to me, approved build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/soc/intel/pantherlake/acpi/gpio.asl b/src/soc/intel/pantherlake/acpi/gpio.asl index c16513b..653f00b 100644 --- a/src/soc/intel/pantherlake/acpi/gpio.asl +++ b/src/soc/intel/pantherlake/acpi/gpio.asl @@ -27,10 +27,10 @@ Local1 = Arg0 - COM1_GRP_PAD_START } /* GPIO Community 3 */ - If (Arg0 >= COM3_GRP_PAD_START && Arg0 <= COM3_GRP_PAD_END) + If (Arg0 >= GPP_H00 && Arg0 <= COM3_GRP_PAD_END) { Local0 = PID_GPIOCOM3 - Local1 = Arg0 - COM3_GRP_PAD_START + Local1 = Arg0 - GPP_H00 } /* GPIO Community 4 */ If (Arg0 >= COM4_GRP_PAD_START && Arg0 <= COM4_GRP_PAD_END) @@ -438,7 +438,7 @@ } } -/* GPIO Community 3: CPUJTAG, GPP_H, GPP_A, VGPIO3 */ +/* GPIO Community 3: GPP_H, GPP_A, VGPIO3 */ Device (GPI3) { Name (_HID, ACPI_GPIO_HID) @@ -471,7 +471,7 @@ Package (0x02) { "intc-gpio-group-count", - NUM_COM3_GROUPS + NUM_COM3_GROUPS - 1 /* Skip CPUJTAG */ }, Package (0x02) @@ -510,12 +510,6 @@ { Package (0x02) { - "intc-gpio-group-0-subproperties", - JTAG - }, - - Package (0x02) - { "intc-gpio-group-1-subproperties", GPPH }, @@ -533,31 +527,10 @@ } } }) - /* first bank/group in community 3: CPUJTAG */ - Name (JTAG, Package (0x02) - { - ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), - Package (0x03) - { - Package (0x02) - { - "intc-gpio-group-name", - GPP_CPUJTAG_NAME - }, - - Package (0x02) - { - "intc-gpio-pad-count", - NUM_GRP_CPUJTAG_PADS - }, - - Package (0x02) - { - "intc-gpio-group-offset", - GPP_CPUJTAG_START_OFFSET - } - } - }) + /* + * Don't expose first bank/group in community 3: CPUJTAG because + * CPUJTAG doesn't required to be controlled by kernel pinctrl driver. + */ /* 2nd bank/group in community 3: GPP_H */ Name (GPPH, Package (0x02) { diff --git a/src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h b/src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h index 0937d1e..69f2f7e 100644 --- a/src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h +++ b/src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h @@ -37,7 +37,6 @@ #define GPP_C_NAME "GPP_C" #define GPP_F_NAME "GPP_F" #define GPP_E_NAME "GPP_E" -#define GPP_CPUJTAG_NAME "GPUJTAG" #define GPP_H_NAME "GPP_H" #define GPP_A_NAME "GPP_A" #define GPP_VGPIO3_NAME "vGPIO_3" -- To view, visit https://review.coreboot.org/c/coreboot/+/86393?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4d920acb95275fbf72b83b822eddc41829511626 Gerrit-Change-Number: 86393 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: soc/intel/pantherlake: Skip exposing CPUJTAG at kernel
by Dinesh Gehlot (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Subrata Banik. Dinesh Gehlot has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86393?usp=email ) Change subject: soc/intel/pantherlake: Skip exposing CPUJTAG at kernel ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86393?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4d920acb95275fbf72b83b822eddc41829511626 Gerrit-Change-Number: 86393 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 05:14:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/pantherlake: Skip exposing CPUJTAG at kernel
by Jayvik Desai (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Subrata Banik. Jayvik Desai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86393?usp=email ) Change subject: soc/intel/pantherlake: Skip exposing CPUJTAG at kernel ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86393?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4d920acb95275fbf72b83b822eddc41829511626 Gerrit-Change-Number: 86393 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 04:53:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/nissa: Create meliks variant
by SH Kim (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86373?usp=email ) Change subject: mb/google/nissa: Create meliks variant ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > > It seems the VBT is requried for the coreboot build, where builder get the VBT file? […] Jenkins was able to build on Patchset 2, but nothing special different on Patchset 6 from Patchset 2. ``` select DRIVERS_INTEL_MIPI_CAMERA select DRIVERS_I2C_DA7219 select INTEL_GMA_HAVE_VBT select SOC_INTEL_TWINLAKE ``` ``` default 0x0 if BOARD_GOOGLE_MELIKS ``` ``` default 13 if BOARD_GOOGLE_MELIKS ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/86373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff5e27ef06a44976c2724751de0f9c6d5cf6eaaf Gerrit-Change-Number: 86373 Gerrit-PatchSet: 6 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 04:29:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: SH Kim <sh_.kim(a)samsung.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/nissa: Create meliks variant
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, SH Kim. Subrata Banik has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86373?usp=email ) Change subject: mb/google/nissa: Create meliks variant ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > It seems the VBT is requried for the coreboot build, where builder get the VBT file? > > - The VBT for meliks has been added by this CL: > https://chrome-internal-review.googlesource.com/c/chromeos/overlays/chipset… > > - Do we need this CL for the builder to get VBT from somewhere? > https://chrome-internal-review.googlesource.com/c/chromeos/project/nissa/me… > > Or should we except `select INTEL_GMA_HAVE_VBT` from Kconfig here and add it later? I don't believe we need VBT here for passing coreboot build. can you please check other board kconfigs -- To view, visit https://review.coreboot.org/c/coreboot/+/86373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff5e27ef06a44976c2724751de0f9c6d5cf6eaaf Gerrit-Change-Number: 86373 Gerrit-PatchSet: 6 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 04:24:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: SH Kim <sh_.kim(a)samsung.corp-partner.google.com>

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