coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: Update arm-trusted-firmware submodule to upstream master
by Yu-Ping Wu (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/86478?usp=email ) Change subject: Update arm-trusted-firmware submodule to upstream master ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86478?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5cb4fab45fb82463f0ae3332e46995d30d123352 Gerrit-Change-Number: 86478 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 08:29:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Update arm-trusted-firmware submodule to upstream master
by Yidi Lin (Code Review) 17 Feb '25

17 Feb '25

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86478?usp=email ) Change subject: Update arm-trusted-firmware submodule to upstream master ...................................................................... Update arm-trusted-firmware submodule to upstream master Updating from commit id 15e5c6c91d48: 2024-12-05 16:00:37 +0100 - (Merge changes I00d2de7b,I5ec82646 into integration) to commit id 0c370e2d592b: 2025-02-04 18:14:07 +0100 - (Merge "feat(mt8196): add SMMU driver for PM" into integration) This brings in 414 new commits. Change-Id: I5cb4fab45fb82463f0ae3332e46995d30d123352 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M 3rdparty/arm-trusted-firmware 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/86478/1 diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware index 15e5c6c..0c370e2 160000 --- a/3rdparty/arm-trusted-firmware +++ b/3rdparty/arm-trusted-firmware @@ -1 +1 @@ -Subproject commit 15e5c6c91d483aa52908154cc80e48956e234232 +Subproject commit 0c370e2d592b96554ac6d5dca4242733ab14300f -- To view, visit https://review.coreboot.org/c/coreboot/+/86478?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5cb4fab45fb82463f0ae3332e46995d30d123352 Gerrit-Change-Number: 86478 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: mb/starlabs/byte: Set SYSTEM_TYPE_MINIPC
by Sean Rhodes (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86471?usp=email ) Change subject: mb/starlabs/byte: Set SYSTEM_TYPE_MINIPC ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86471?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I65ca75a57dbc4a9251316d48bf660dd631c716dd Gerrit-Change-Number: 86471 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 08:21:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/nissa/var/dirks: Generate SPD ID for supported parts
by Ivy Jian (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Ivy Jian has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/86477?usp=email ) Change subject: mb/google/nissa/var/dirks: Generate SPD ID for supported parts ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86477?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ca97e28852660cae0352d771e30c9348a5939a0 Gerrit-Change-Number: 86477 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 08:19:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
by Johannes Hahn (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh. Hello Mario Scheithauer, Uwe Poeche, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86424?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ...................................................................... src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization Process the single SPD data file which resides in cbfs. Add KConfig switch for SPD data in cbfs and include Nanya_NT6AP512T32BV-J1I.spd.hex into the build by adding a correspondig Makefile.mk in the spd folder. Additional to load the memory confiugration FSP-M parameters for the romstage are set. Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Signed-off-by: Johannes Hahn <johannes-hahn(a)siemens.com> --- M src/mainboard/siemens/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/romstage_fsp_params.c A src/mainboard/siemens/fa_ehl/spd/Makefile.mk R src/mainboard/siemens/fa_ehl/spd/Nanya_NT6AP512T32BV-J1I.spd.hex A src/mainboard/siemens/fa_ehl/spd/spd.h M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c 9 files changed, 29 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86424/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Gerrit-Change-Number: 86424 Gerrit-PatchSet: 5 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>

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[XS] Change in coreboot[main]: mb/google/nissa/var/dirks: Generate SPD ID for supported parts
by David Wu (Code Review) 17 Feb '25

17 Feb '25

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86477?usp=email ) Change subject: mb/google/nissa/var/dirks: Generate SPD ID for supported parts ...................................................................... mb/google/nissa/var/dirks: Generate SPD ID for supported parts Add supported memory parts in mem_parts_used.txt, and generate SPD id for these parts. 1. K3KL9L90CM-MGCT (SAMSUNG) 2. H58G66BK8BX067 (HYNIX) BUG=b:388117663 TEST=Run part_id_gen tool and check the generated files. Change-Id: I1ca97e28852660cae0352d771e30c9348a5939a0 Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/dirks/memory/Makefile.mk M src/mainboard/google/brya/variants/dirks/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/dirks/memory/mem_parts_used.txt 3 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/86477/1 diff --git a/src/mainboard/google/brya/variants/dirks/memory/Makefile.mk b/src/mainboard/google/brya/variants/dirks/memory/Makefile.mk index 2d0d1bb..67b6ac1 100644 --- a/src/mainboard/google/brya/variants/dirks/memory/Makefile.mk +++ b/src/mainboard/google/brya/variants/dirks/memory/Makefile.mk @@ -10,3 +10,5 @@ SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 3(0b0011) Parts = K3LKBKB0BM-MGCP SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 4(0b0100) Parts = K3KL8L80CM-MGCT SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 5(0b0101) Parts = H58G56BK8BX068 +SPD_SOURCES += spd/lp5/set-0/spd-8.hex # ID = 6(0b0110) Parts = K3KL9L90CM-MGCT +SPD_SOURCES += spd/lp5/set-0/spd-10.hex # ID = 7(0b0111) Parts = H58G66BK8BX067 diff --git a/src/mainboard/google/brya/variants/dirks/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/dirks/memory/dram_id.generated.txt index c10bbb7..059f1e6 100644 --- a/src/mainboard/google/brya/variants/dirks/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/dirks/memory/dram_id.generated.txt @@ -12,3 +12,5 @@ H9JCNNNCP3MLYR-N6E 0 (0000) K3KL8L80CM-MGCT 4 (0100) H58G56BK8BX068 5 (0101) +K3KL9L90CM-MGCT 6 (0110) +H58G66BK8BX067 7 (0111) diff --git a/src/mainboard/google/brya/variants/dirks/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/dirks/memory/mem_parts_used.txt index 2c18a19..61be3e7 100644 --- a/src/mainboard/google/brya/variants/dirks/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/dirks/memory/mem_parts_used.txt @@ -17,3 +17,5 @@ H9JCNNNCP3MLYR-N6E K3KL8L80CM-MGCT H58G56BK8BX068 +K3KL9L90CM-MGCT +H58G66BK8BX067 -- To view, visit https://review.coreboot.org/c/coreboot/+/86477?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ca97e28852660cae0352d771e30c9348a5939a0 Gerrit-Change-Number: 86477 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Add early shutdown notification hook
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86476?usp=email ) Change subject: soc/intel/pantherlake: Add early shutdown notification hook ...................................................................... soc/intel/pantherlake: Add early shutdown notification hook This commit adds a placeholder function platform_display_early_shutdown_notification for displaying an early shutdown notification (e.g., low battery warning) using uGOP. This function will be implemented in a future commit. This commit also enables the HAVE_ESOL_SUPPORT_FOR_LOW_BATTERY_INDICATOR Kconfig option, which is required for displaying the VGA text message during early shutdown. BUG=b:339673254 TEST=Verified low battery boot event logging and controlled shutdown. Change-Id: I45c0fb07b984fcde6209631612cb8b4a08ac2041 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/pantherlake/Kconfig M src/soc/intel/pantherlake/romstage/fsp_params.c 2 files changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/86476/1 diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index 5326020..9329845 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -21,6 +21,7 @@ select FSPS_HAS_ARCH_UPD select GENERIC_GPIO_LIB select HAVE_DEBUG_RAM_SETUP + select HAVE_ESOL_SUPPORT_FOR_LOW_BATTERY_INDICATOR if CHROMEOS_ENABLE_ESOL select HAVE_FSP_GOP select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP select HAVE_HYPERTHREADING diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c index 0c17d02..4df4dde 100644 --- a/src/soc/intel/pantherlake/romstage/fsp_params.c +++ b/src/soc/intel/pantherlake/romstage/fsp_params.c @@ -286,6 +286,13 @@ m_cfg->EnableFastVmode[i] = 0; } +#if CONFIG(PLATFORM_HAS_EARLY_LOW_BATTERY_INDICATOR) +void platform_display_early_shutdown_notification(void *arg) +{ + /* Placeholder to set VGA text message (using FSP-M UPDs) by calling FSP-uGOP */ +} +#endif + static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_pantherlake_config *config) { -- To view, visit https://review.coreboot.org/c/coreboot/+/86476?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I45c0fb07b984fcde6209631612cb8b4a08ac2041 Gerrit-Change-Number: 86476 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/ptl: Enable FSP_UGOP_EARLY_SIGN_OF_LIFE for pantherlake
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/86475?usp=email ) Change subject: soc/intel/ptl: Enable FSP_UGOP_EARLY_SIGN_OF_LIFE for pantherlake ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: Please use https://review.coreboot.org/c/coreboot/+/85454/16/src/soc/intel/pantherlake… -- To view, visit https://review.coreboot.org/c/coreboot/+/86475?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id1e2beb803ed887f6011cdd9da6fb842c2786a08 Gerrit-Change-Number: 86475 Gerrit-PatchSet: 1 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 07:44:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/ptl: Enable FSP_UGOP_EARLY_SIGN_OF_LIFE for pantherlake
by Jayvik Desai (Code Review) 17 Feb '25

17 Feb '25

Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86475?usp=email ) Change subject: soc/intel/ptl: Enable FSP_UGOP_EARLY_SIGN_OF_LIFE for pantherlake ...................................................................... soc/intel/ptl: Enable FSP_UGOP_EARLY_SIGN_OF_LIFE for pantherlake This patch enables eSOL Kconfig until the feature is ready in PTL FSP-uGOP binary. TEST=Able to build and boot google/fatcat to OS. Change-Id: Id1e2beb803ed887f6011cdd9da6fb842c2786a08 Signed-off-by: Jayvik Desai <jayvik(a)google.com> --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/86475/1 diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index 5326020..dde401b 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -17,6 +17,7 @@ select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP + select FSP_UGOP_EARLY_SIGN_OF_LIFE select FSP_USES_CB_DEBUG_EVENT_HANDLER select FSPS_HAS_ARCH_UPD select GENERIC_GPIO_LIB -- To view, visit https://review.coreboot.org/c/coreboot/+/86475?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id1e2beb803ed887f6011cdd9da6fb842c2786a08 Gerrit-Change-Number: 86475 Gerrit-PatchSet: 1 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com>

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[S] Change in coreboot[main]: soc/intel/pantherlake: Display Sign-of-Life during memory training
by Subrata Banik (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Vikrant L Jadeja. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85454?usp=email ) Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training ...................................................................... Patch Set 16: (2 comments) File src/soc/intel/pantherlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/85454/comment/28c46d4d_6b97ac93?us… : PS16, Line 366: : #define UX_MEMORY_TRAINING_DESC "memory_training_desc" not needed https://review.coreboot.org/c/coreboot/+/85454/comment/9d4ecb26_ff809a12?us… : PS16, Line 384: const char *text = ux_locales_get_text(UX_MEMORY_TRAINING_DESC); : /* No localized text found; fallback to built-in English. */ : if (!text) : text = "Your device is finishing an update. " : "This may take 1-2 minutes.\n" : "Please do not turn off your device."; just use ``` const char *text = ux_locales_get_text(UX_LOCALE_MSG_MEMORY_TRAINING); ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367 Gerrit-Change-Number: 85454 Gerrit-PatchSet: 16 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 07:25:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit February 2025