coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/siemens/fa_ehl/variants/fa_ehl: Remove I210 driver
by Johannes Hahn (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh. Hello Mario Scheithauer, Uwe Poeche, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86425?usp=email to look at the new patch set (#2). Change subject: mb/siemens/fa_ehl/variants/fa_ehl: Remove I210 driver ...................................................................... mb/siemens/fa_ehl/variants/fa_ehl: Remove I210 driver Intel I210 Ethernet Transceiver is not used on the platform. Change-Id: I413cb334ee06e3fc7183dc2621b6091f0d0b602b Signed-off-by: Johannes Hahn <johannes-hahn(a)siemens.com> --- M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/86425/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86425?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I413cb334ee06e3fc7183dc2621b6091f0d0b602b Gerrit-Change-Number: 86425 Gerrit-PatchSet: 2 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>

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[M] Change in coreboot[main]: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
by Johannes Hahn (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Mario Scheithauer, Paul Menzel, Uwe Poeche, Werner Zeh. Johannes Hahn has posted comments on this change by Johannes Hahn. ( https://review.coreboot.org/c/coreboot/+/86424?usp=email ) Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ...................................................................... Patch Set 6: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86424/comment/be004513_06f19092?us… : PS5, Line 9: KConfig > Kconfig Done https://review.coreboot.org/c/coreboot/+/86424/comment/1e682d76_97763e77?us… : PS5, Line 10: Nanya_NT6AP512T32BV-J1I.spd.hex > How was this created? We received the SPD file from the vendor in exactly that format. https://review.coreboot.org/c/coreboot/+/86424/comment/49e0de83_854922fb?us… : PS5, Line 12: Additional > Additional*ly* Done https://review.coreboot.org/c/coreboot/+/86424/comment/aed633b6_036fd580?us… : PS5, Line 12: confiugration > configuration Done File src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig: https://review.coreboot.org/c/coreboot/+/86424/comment/d427f60f_3cf715cd?us… : PS5, Line 10: select USE_SIEMENS_HWILIB > Please make this a separate commit. Thanks for mentioning that. How should I proceed to create a new commit? How can I separate the change form this commit? Without this Kconfig switch the mainboard can not be build as it still contains code from the copied platform which uses hwlib functions. File src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c: https://review.coreboot.org/c/coreboot/+/86424/comment/4d3a8a81_871a96b6?us… : PS5, Line 4: #include <gpio.h> > Please make this a separate commit. Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/86424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Gerrit-Change-Number: 86424 Gerrit-PatchSet: 6 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 14:35:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
by Johannes Hahn (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh. Hello Mario Scheithauer, Uwe Poeche, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86424?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ...................................................................... src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization Process the single SPD data file which resides in cbfs. Add Kconfig switch for SPD data in cbfs and include Nanya_NT6AP512T32BV-J1I.spd.hex into the build by adding a correspondig Makefile.mk in the spd folder. Additionally to load the memory configuration FSP-M parameters for the romstage are set. Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Signed-off-by: Johannes Hahn <johannes-hahn(a)siemens.com> --- M src/mainboard/siemens/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/romstage_fsp_params.c A src/mainboard/siemens/fa_ehl/spd/Makefile.mk R src/mainboard/siemens/fa_ehl/spd/Nanya_NT6AP512T32BV-J1I.spd.hex A src/mainboard/siemens/fa_ehl/spd/spd.h M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c 9 files changed, 29 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86424/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/86424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Gerrit-Change-Number: 86424 Gerrit-PatchSet: 6 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>

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[S] Change in coreboot[main]: soc/intel/common: Add support for RTD3 on CNVi
by Sean Rhodes (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Cliff Huang, Intel coreboot Reviewers, Jérémy Compostella, Sean Rhodes. Hello Cliff Huang, Intel coreboot Reviewers, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86403?usp=email to look at the new patch set (#17). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/common: Add support for RTD3 on CNVi ...................................................................... soc/intel/common: Add support for RTD3 on CNVi Hook CNVC and CNVS Methods into the power resource for the CNVi which is provided via the `wifi/generic` driver to allow for RTD3. Change-Id: I22292ad97c439e50fe5d7a6b79f77847e71ca62c Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/cannonlake/chip.h M src/soc/intel/common/block/cnvi/cnvi.c M src/soc/intel/tigerlake/chip.h 3 files changed, 45 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/86403/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/86403?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I22292ad97c439e50fe5d7a6b79f77847e71ca62c Gerrit-Change-Number: 86403 Gerrit-PatchSet: 17 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[M] Change in coreboot[main]: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
by Paul Menzel (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh. Paul Menzel has posted comments on this change by Johannes Hahn. ( https://review.coreboot.org/c/coreboot/+/86424?usp=email ) Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ...................................................................... Patch Set 5: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86424/comment/732c5c58_f3922be7?us… : PS5, Line 9: KConfig Kconfig https://review.coreboot.org/c/coreboot/+/86424/comment/6752de69_84984aa9?us… : PS5, Line 10: Nanya_NT6AP512T32BV-J1I.spd.hex How was this created? https://review.coreboot.org/c/coreboot/+/86424/comment/41e29f3d_d7d36bb4?us… : PS5, Line 12: confiugration configuration https://review.coreboot.org/c/coreboot/+/86424/comment/6da6bd68_c2bc8657?us… : PS5, Line 12: Additional Additional*ly* File src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig: https://review.coreboot.org/c/coreboot/+/86424/comment/bf9be2a2_7365e3c6?us… : PS5, Line 10: select USE_SIEMENS_HWILIB Please make this a separate commit. File src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c: https://review.coreboot.org/c/coreboot/+/86424/comment/b8cecaaa_b7f82584?us… : PS5, Line 4: #include <gpio.h> Please make this a separate commit. -- To view, visit https://review.coreboot.org/c/coreboot/+/86424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Gerrit-Change-Number: 86424 Gerrit-PatchSet: 5 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 13:03:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: drivers/usb/: Add Kconfig for Intel BT ACPI functions
by Sean Rhodes (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86426?usp=email ) Change subject: drivers/usb/: Add Kconfig for Intel BT ACPI functions ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Generates bluetooth code for every USB port that's on -- To view, visit https://review.coreboot.org/c/coreboot/+/86426?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If933ba7ab80a27b7afcf1e6743705613d019819e Gerrit-Change-Number: 86426 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 12:46:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: drivers/usb/: Add Kconfig for Intel BT ACPI functions
by Sean Rhodes (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86426?usp=email ) The change is no longer submittable: Code-Review is unsatisfied now. Change subject: drivers/usb/: Add Kconfig for Intel BT ACPI functions ...................................................................... Patch Set 1: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86426?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If933ba7ab80a27b7afcf1e6743705613d019819e Gerrit-Change-Number: 86426 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 12:43:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: Kconfig: Rework SYSTEM_TYPE_XX to better map to SMBIOS
by Andy Ebrahiem (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro. Andy Ebrahiem has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86454?usp=email ) Change subject: Kconfig: Rework SYSTEM_TYPE_XX to better map to SMBIOS ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2a35101ccc60daf4863568216ef145c9c701140b Gerrit-Change-Number: 86454 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 17 Feb 2025 11:41:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: sb/intel/common: Add GPIO serial blink console support
by Paul Menzel (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jérémy Compostella, Keith Hui, Nicholas Chin. Paul Menzel has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/86390?usp=email ) Change subject: sb/intel/common: Add GPIO serial blink console support ...................................................................... Patch Set 2: (6 comments) Patchset: PS2: Nice. File Documentation/technotes/console.md: https://review.coreboot.org/c/coreboot/+/86390/comment/6460dc4b_e79c432f?us… : PS2, Line 177: a LED an LED https://review.coreboot.org/c/coreboot/+/86390/comment/fd9c6ecc_3c35881a?us… : PS2, Line 178: pulls pull (without s)? https://review.coreboot.org/c/coreboot/+/86390/comment/a13eede4_f650dc60?us… : PS2, Line 182: No space. https://review.coreboot.org/c/coreboot/+/86390/comment/17751906_08e7dfa9?us… : PS2, Line 183: to base your circuit off of Sounds strange, but I am no native speaker. File src/console/Kconfig: https://review.coreboot.org/c/coreboot/+/86390/comment/2ddef560_6cc498cc?us… : PS2, Line 405: an a -- To view, visit https://review.coreboot.org/c/coreboot/+/86390?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0741142fe21eba4989d28b96e795d3bfa3085466 Gerrit-Change-Number: 86390 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 11:30:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/glados/var/cave: Set SYSTEM_TYPE_CONVERTIBLE
by Andy Ebrahiem (Code Review) 17 Feb '25

17 Feb '25

Attention is currently required from: Matt DeVillier. Andy Ebrahiem has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86467?usp=email ) Change subject: mb/google/glados/var/cave: Set SYSTEM_TYPE_CONVERTIBLE ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86467?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8f2ec82c97676aa315c18286b5e2eb94d46004ec Gerrit-Change-Number: 86467 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 17 Feb 2025 11:30:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit February 2025