coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: soc/mediatek/common/dp: Initialize dptx_misc
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85877?usp=email ) Change subject: soc/mediatek/common/dp: Initialize dptx_misc ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85877?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80e0f83f238d9b4c1ed0e1d1b219f4fb89a6cd22 Gerrit-Change-Number: 85877 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:16:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/starlabs/*: Configure GPIO UPDs for eSPI
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85691?usp=email ) Change subject: mb/starlabs/*: Configure GPIO UPDs for eSPI ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85691/comment/69ab8b47_519e28cf?us… : PS6, Line 9: FSP defaults to using pins that are used for LPC; given that : coreboot and these boards only supports eSPI, set these pins : accordingly. > what's the end result of setting these vs not? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Gerrit-Change-Number: 85691 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:57:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: mb/starlabs/*: Configure GPIO UPDs for eSPI
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85691?usp=email to look at the new patch set (#7). Change subject: mb/starlabs/*: Configure GPIO UPDs for eSPI ...................................................................... mb/starlabs/*: Configure GPIO UPDs for eSPI FSP defaults to using pins that are used for LPC; given that coreboot and these boards only supports eSPI, set these pins accordingly. If this is not done, FSP will assert and not boot. Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/Makefile.mk A src/mainboard/starlabs/byte_adl/variants/mk_ii/ramstage.c M src/mainboard/starlabs/starbook/variants/adl/ramstage.c M src/mainboard/starlabs/starbook/variants/rpl/ramstage.c M src/mainboard/starlabs/starfighter/variants/rpl/ramstage.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/Makefile.mk A src/mainboard/starlabs/starlite_adl/variants/mk_v/ramstage.c 7 files changed, 53 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/85691/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Gerrit-Change-Number: 85691 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems>

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[S] Change in coreboot[main]: mb/starlabs/*: Set all I2C speeds to fast
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84736?usp=email ) Change subject: mb/starlabs/*: Set all I2C speeds to fast ...................................................................... Patch Set 7: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84736/comment/1cd99536_4e3c89a9?us… : PS6, Line 9: driver > which driver? Linux? Done https://review.coreboot.org/c/coreboot/+/84736/comment/fe1ab798_7c117765?us… : PS6, Line 13: negligable > spelling Done https://review.coreboot.org/c/coreboot/+/84736/comment/3d51afb4_7a25711e?us… : PS6, Line 14: option to configure it. > "unused option" ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic722e971e6f94965d28fd158a46d144a19490199 Gerrit-Change-Number: 84736 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:57:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: mb/starlabs/*: Set all I2C speeds to fast
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Paul Menzel, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84736?usp=email to look at the new patch set (#7). Change subject: mb/starlabs/*: Set all I2C speeds to fast ...................................................................... mb/starlabs/*: Set all I2C speeds to fast The default i2c speed is I2C_SPEED_STANDARD, but the coreboot driver defaults to I2C_SPEED_FAST. The difference in performance and power consumption is negligible, so set the buses to fast and remove the superfluous option. Change-Id: Ic722e971e6f94965d28fd158a46d144a19490199 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starbook/variants/adl/devicetree.cb M src/mainboard/starlabs/starbook/variants/cml/devicetree.cb M src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb M src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c 7 files changed, 39 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/84736/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/84736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic722e971e6f94965d28fd158a46d144a19490199 Gerrit-Change-Number: 84736 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84734?usp=email ) Change subject: ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84734/comment/86d5583b_b40cb091?us… : PS6, Line 12: Also, use local variables to cache reads of the same variable. > nit: maybe add 'within a given ACPI method' to the end since to add context Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0bbb538017cc004bff1989a8017ccfcd1ba9ab5c Gerrit-Change-Number: 84734 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:55:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84734?usp=email to look at the new patch set (#7). Change subject: ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory ...................................................................... ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory Ensure any reads or writes to the EC memory, are performed with ECRD (Read) and ECWR (Write) as these methods use a mutex. Also, use local variables to cache reads of the same variable within a given ACPI method. This solves: Initialized Arguments for Method [ECRD]: (1 arguments defined for method invocation) Arg0: 00000000967261a4 [RefOf] <Node> Name ECPS RegionField 000000007d4b8073 ACPI Error: Aborting method \_SB.PCI0.LPCB.EC.ECRD due to previous error (AE_BAD_PARAMETER) (20230628/psparse-529) ACPI Error: Aborting method \_SB.PCI0.LPCB.EC.ADP1._PSR due to previous error (AE_BAD_PARAMETER) (20230628/psparse-529) Change-Id: I0bbb538017cc004bff1989a8017ccfcd1ba9ab5c Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/ec/starlabs/merlin/acpi/battery.asl M src/ec/starlabs/merlin/acpi/ec.asl M src/ec/starlabs/merlin/acpi/suspend.asl M src/ec/starlabs/merlin/variants/apl/events.asl M src/ec/starlabs/merlin/variants/cezanne/events.asl M src/ec/starlabs/merlin/variants/glk/events.asl M src/ec/starlabs/merlin/variants/glkr/events.asl M src/ec/starlabs/merlin/variants/kbl/events.asl M src/ec/starlabs/merlin/variants/merlin/events.asl 9 files changed, 46 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/84734/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/84734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0bbb538017cc004bff1989a8017ccfcd1ba9ab5c Gerrit-Change-Number: 84734 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems>

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[M] Change in coreboot[main]: ec/starlabs/merlin: Add support for setting the charging speed
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Angel Pons, Matt DeVillier, Maxim Polyakov, Maximilian Brune, Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84633?usp=email ) Change subject: ec/starlabs/merlin: Add support for setting the charging speed ...................................................................... Patch Set 18: (1 comment) Patchset: PS18: Accidentally push PS17, or intentional? -- To view, visit https://review.coreboot.org/c/coreboot/+/84633?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46faa540530c5bd7f5473021561380213158152e Gerrit-Change-Number: 84633 Gerrit-PatchSet: 18 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:55:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: {ec,mb}/starlabs: Drop remnants of EC mirror flag
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/85870?usp=email ) Change subject: {ec,mb}/starlabs: Drop remnants of EC mirror flag ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85870?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6eb8c9a6ef8f92e2d92081b8451cef8d7246ff7e Gerrit-Change-Number: 85870 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:23:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/rauru: Implement mainboard_get_storage_type
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85879?usp=email ) Change subject: mb/google/rauru: Implement mainboard_get_storage_type ...................................................................... mb/google/rauru: Implement mainboard_get_storage_type Replace existing storage_type with mainboard_get_storage_type TEST=emerge-rauru coreboot Change-Id: I28e0e4294c9a44f1eb17147928ef2860227ff7d3 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/mainboard/google/rauru/boardid.c M src/mainboard/google/rauru/mainboard.c M src/mainboard/google/rauru/storage.h 3 files changed, 21 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/85879/1 diff --git a/src/mainboard/google/rauru/boardid.c b/src/mainboard/google/rauru/boardid.c index e3e0979..d9f1585 100644 --- a/src/mainboard/google/rauru/boardid.c +++ b/src/mainboard/google/rauru/boardid.c @@ -66,21 +66,6 @@ return cached_storage_id; } -enum ufs_type storage_type(uint32_t index) -{ - switch (index) { - case 0: - return UFS_40; - case 1: - return UFS_31; - case 2: - return UFS_40_HS; - default: - printk(BIOS_DEBUG, "unsupported type %d\n", index); - } - return UFS_UNKNOWN; -} - uint32_t sku_id(void) { static uint32_t cached_sku_code = BOARD_ID_INIT; diff --git a/src/mainboard/google/rauru/mainboard.c b/src/mainboard/google/rauru/mainboard.c index a49caf6..34e4330 100644 --- a/src/mainboard/google/rauru/mainboard.c +++ b/src/mainboard/google/rauru/mainboard.c @@ -12,9 +12,11 @@ #include <soc/msdc.h> #include <soc/pcie.h> #include <soc/spm_common.h> +#include <soc/storage.h> #include <soc/usb.h> #include "gpio.h" +#include "storage.h" #define AFE_SE_SECURE_CON1 (AUDIO_BASE + 0x5634) @@ -46,6 +48,25 @@ gpio_output(GPIO_FP_RST_1V8_S3_L, 1); } +enum mtk_storage_type mainboard_get_storage_type(void) +{ + uint32_t index = storage_id(); + + switch (index) { + case 0: + return STORAGE_UFS_40; + case 1: + return STORAGE_UFS_31; + case 2: + return STORAGE_UFS_40_HS; + case 3: + return STORAGE_NVME; + default: + printk(BIOS_DEBUG, "unsupported type %u\n", index); + } + return STORAGE_UNKNOWN; +} + bool mainboard_needs_pcie_init(void) { return true; diff --git a/src/mainboard/google/rauru/storage.h b/src/mainboard/google/rauru/storage.h index a97bbcb..a1b4d63 100644 --- a/src/mainboard/google/rauru/storage.h +++ b/src/mainboard/google/rauru/storage.h @@ -3,14 +3,6 @@ #ifndef __MAINBOARD_GOOGLE_RAURU_STORAGE_H__ #define __MAINBOARD_GOOGLE_RAURU_STORAGE_H__ -enum ufs_type { - UFS_UNKNOWN = 0, - UFS_31 = 0x310, - UFS_40 = 0x400, - UFS_40_HS = 0x401, -}; - uint32_t storage_id(void); -enum ufs_type storage_type(uint32_t index); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/85879?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I28e0e4294c9a44f1eb17147928ef2860227ff7d3 Gerrit-Change-Number: 85879 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit January 2025