coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

1 participants
3269 discussions

[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Keith Hui (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Bill XIE. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 1: (1 comment) File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c: https://review.coreboot.org/c/coreboot/+/85413/comment/f7c70484_e6de550e?us… : PS1, Line 67: gpio5 |= 0x20; > After commenting out "drq 0xf4 = 0xfc" for GPIO5 in overridetree. […] I'm investigating. In the meantime, can you check PCH soft strap 9? RCBA32(0x400) or dump the IFD on your board and check with ifdtool. Also what is your board's PCB revision? Should be next to model number on the board itself. My boardview is for 1.02D. -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Fri, 17 Jan 2025 15:13:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add eDP driver
by Jarried Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Bincai Liu, Hung-Te Lin, Jarried Lin, Yidi Lin. Hello Bincai Liu, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85949?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add eDP driver ...................................................................... soc/mediatek/mt8196: Add eDP driver Add eDP driver to adjust training flow and turn off PHY power before PHY configuration to prevent potential link training failures. TEST=check edp training pass and show log: EQ training pass BUG=b:343351631 Change-Id: Iccba53f6c6181ca84624c216f9641a2ae9041671 Signed-off-by: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/soc/mediatek/common/dp/include/soc/dptx_common.h M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/dp_intf.c A src/soc/mediatek/mt8196/dptx.c A src/soc/mediatek/mt8196/dptx_hal.c M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/dp_intf.h A src/soc/mediatek/mt8196/include/soc/dptx.h A src/soc/mediatek/mt8196/include/soc/dptx_hal.h A src/soc/mediatek/mt8196/include/soc/dptx_reg.h 10 files changed, 1,488 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/85949/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iccba53f6c6181ca84624c216f9641a2ae9041671 Gerrit-Change-Number: 85949 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[M] Change in coreboot[main]: soc/mediatek: Allow specifying multiple EINT base registers
by Yidi Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Xi Chen, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86033?usp=email ) Change subject: soc/mediatek: Allow specifying multiple EINT base registers ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86033?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Gerrit-Change-Number: 86033 Gerrit-PatchSet: 4 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 13:58:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek: Modify MT6685 pmic driver
by Yidi Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86035?usp=email ) Change subject: soc/mediatek: Modify MT6685 pmic driver ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86035/comment/f100601e_44b22ab3?us… : PS1, Line 9: Use mt6685_write8 instead of mt6685_write16 when setting the protect : key, only need 1 byte needs to be written to the register each time. When writing key_protect_setting to PMIC, PMIC expects receiving 1 byte per write. PMIC would receive unexpected zero byte if using `mt6685_write16`. Fix the write operation by using mt6685_write8. -- To view, visit https://review.coreboot.org/c/coreboot/+/86035?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6e79642e813e7a1f0d38243e9c4db5a699cc9e3 Gerrit-Change-Number: 86035 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 13:57:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek: Modify MT6363 pmic driver
by Yidi Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86034?usp=email ) Change subject: soc/mediatek: Modify MT6363 pmic driver ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86034/comment/abd68c36_f8b51d50?us… : PS1, Line 7: soc/mediatek: Modify MT6363 pmic driver soc/mediatek/common: Fix wrong write API for protect_key_setting https://review.coreboot.org/c/coreboot/+/86034/comment/63fbfade_f2ac0ac2?us… : PS1, Line 8: : Use mt6363_write8 instead of mt6363_write16 when setting the protect : key, only need 1 byte needs to be written to the register each time. : Remove mt6363_write16 api to prevent build failure. Please state the problem. -- To view, visit https://review.coreboot.org/c/coreboot/+/86034?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0a7c0d2fa1f93a55731b4b58923d6f80a4c4be89 Gerrit-Change-Number: 86034 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 13:51:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek: Allow specifying multiple EINT base registers
by Jarried Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Xi Chen, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86033?usp=email ) Change subject: soc/mediatek: Allow specifying multiple EINT base registers ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > @yupingso@google.com or @jarried.lin@mediatek.com Please revert the patch to PS1. Sorry about that...., i have reverted it. -- To view, visit https://review.coreboot.org/c/coreboot/+/86033?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Gerrit-Change-Number: 86033 Gerrit-PatchSet: 4 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 13:49:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add DDP driver
by Nancy Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Nancy Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85950?usp=email ) Change subject: soc/mediatek/mt8196: Add DDP driver ...................................................................... Patch Set 10: (4 comments) File src/soc/mediatek/mt8196/ddp.c: https://review.coreboot.org/c/coreboot/+/85950/comment/fd03a0fc_265ee63a?us… : PS9, Line 267: BIT(28) | BIT(31)); > exceed 96 characters Done https://review.coreboot.org/c/coreboot/+/85950/comment/3ed741d2_7cb841b8?us… : PS9, Line 291: d > %u Done https://review.coreboot.org/c/coreboot/+/85950/comment/db1f50bb_2abf553a?us… : PS9, Line 301: d > %u Done https://review.coreboot.org/c/coreboot/+/85950/comment/286ee641_bf4aded6?us… : PS9, Line 306: %d/%d exceed hw limit %d\ > use %u Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85950?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I006911e83d940c1eec7135a6a0c36fbfa2aad466 Gerrit-Change-Number: 85950 Gerrit-PatchSet: 10 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 13:48:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek: Allow specifying multiple EINT base registers
by Jarried Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Chhao Chang, Hung-Te Lin, Xi Chen, Yu-Ping Wu. Jarried Lin has uploaded a new patch set (#4) to the change originally created by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86033?usp=email ) Change subject: soc/mediatek: Allow specifying multiple EINT base registers ...................................................................... soc/mediatek: Allow specifying multiple EINT base registers Unlike MT8186/MT8188/MT8192/MT8195, MT8196 has 5 EINT base registers, each with a different number of EINT bits. In preparation for the upcoming MT8196 EINT unmasking support, replace the `eint_event_reg` struct (which has a hardcoded register number) with an array `eint_event` to specify the EINT base register(s). BUG=none TEST=emerge-geralt coreboot BRANCH=none Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/common/eint_event.c A src/soc/mediatek/common/eint_event_info.c M src/soc/mediatek/common/include/soc/eint_event.h M src/soc/mediatek/mt8186/Makefile.mk M src/soc/mediatek/mt8188/Makefile.mk M src/soc/mediatek/mt8192/Makefile.mk M src/soc/mediatek/mt8195/Makefile.mk 7 files changed, 44 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/86033/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86033?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Gerrit-Change-Number: 86033 Gerrit-PatchSet: 4 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add DDP driver
by Nancy Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Nancy Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Nancy Lin has uploaded a new patch set (#10) to the change originally created by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85950?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Yidi Lin, Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add DDP driver ...................................................................... soc/mediatek/mt8196: Add DDP driver Add DDP (display data pipe) driver that supports main path to eDP panel. TEST=build pass and firmware display ok BUG=b:343351631 Signed-off-by: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Change-Id: I006911e83d940c1eec7135a6a0c36fbfa2aad466 --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/ddp.c M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/ddp.h A src/soc/mediatek/mt8196/include/soc/dsi.h 5 files changed, 802 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/85950/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/85950?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I006911e83d940c1eec7135a6a0c36fbfa2aad466 Gerrit-Change-Number: 85950 Gerrit-PatchSet: 10 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek: Allow specifying multiple EINT base registers
by Yidi Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Chhao Chang, Hung-Te Lin, Xi Chen, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86033?usp=email ) Change subject: soc/mediatek: Allow specifying multiple EINT base registers ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: @yupingso@google.com or @jarried.lin@mediatek.com Please revert the patch to PS1. -- To view, visit https://review.coreboot.org/c/coreboot/+/86033?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Gerrit-Change-Number: 86033 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 13:39:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit January 2025