coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: CFR: Add min/max/step values and hex display flag for number options
by Angel Pons (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Filip Brozovic, Matt DeVillier, Sean Rhodes. Angel Pons has posted comments on this change by Filip Brozovic. ( https://review.coreboot.org/c/coreboot/+/86039?usp=email ) Change subject: CFR: Add min/max/step values and hex display flag for number options ...................................................................... Patch Set 3: (1 comment) File src/commonlib/include/commonlib/cfr.h: https://review.coreboot.org/c/coreboot/+/86039/comment/d30c9277_c94ffd82?us… : PS2, Line 139: uint32_t min; : uint32_t max; : uint32_t step; > Should we add a fixed version number to the header in coreboot, change `lb_cfr_numeric_option` to ad […] Yes, though the main idea of a CFR version number is to prevent parsing incompatible data structures, i.e. if the version number doesn't match, don't even try to parse anything. It's simpler than supporting multiple versions, and everything should be using the latest version anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/86039?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e70f1430fb1911f1ad974832f8abfe76f928ac3 Gerrit-Change-Number: 86039 Gerrit-PatchSet: 3 Gerrit-Owner: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 08:27:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Filip Brozovic <fbrozovic(a)gmail.com>

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[S] Change in coreboot[main]: CFR: Add min/max/step values and hex display flag for number options
by Filip Brozovic (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Angel Pons, Matt DeVillier, Sean Rhodes. Hello Angel Pons, Matt DeVillier, Sean Rhodes, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86039?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: CFR: Add min/max/step values and hex display flag for number options ...................................................................... CFR: Add min/max/step values and hex display flag for number options This commit adds support for minimum/maximum limit values as well as step sizes for CFR number options. Additionally, add a new flag that specifies the option should be displayed in hexadecimal notation instead of decimal. Change-Id: I2e70f1430fb1911f1ad974832f8abfe76f928ac3 Signed-off-by: Filip Brozovic <fbrozovic(a)gmail.com> --- M src/commonlib/include/commonlib/cfr.h M src/commonlib/include/commonlib/coreboot_tables.h M src/drivers/option/cfr.c M src/drivers/option/cfr_frontend.h 4 files changed, 34 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/86039/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86039?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e70f1430fb1911f1ad974832f8abfe76f928ac3 Gerrit-Change-Number: 86039 Gerrit-PatchSet: 3 Gerrit-Owner: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: mb/google/rauru: Add panel driver in mainboard
by Bincai Liu (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Bincai Liu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85951?usp=email ) Change subject: mb/google/rauru: Add panel driver in mainboard ...................................................................... Patch Set 13: (1 comment) File src/mainboard/google/rauru/panel_oled.c: https://review.coreboot.org/c/coreboot/+/85951/comment/c50ae139_258ea4da?us… : PS12, Line 19: gpio_output(GPIO_AP_EDP_BKLTEN, 0); : gpio_output(GPIO_BL_PWM_1V8, 0); > This should be extracted to `configure_backlight`, and be assigned to `oled_panel. […] merged this file into panel.c -- To view, visit https://review.coreboot.org/c/coreboot/+/85951?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea610c97351beb94a49cc1044701a523b7c85a6e Gerrit-Change-Number: 85951 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 08:00:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: mb/google/rauru: Add panel driver in mainboard
by Jarried Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Bincai Liu, Hung-Te Lin, Jarried Lin, Yidi Lin. Hello Bincai Liu, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85951?usp=email to look at the new patch set (#13). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/rauru: Add panel driver in mainboard ...................................................................... mb/google/rauru: Add panel driver in mainboard Add panel driver in mainboard for rauru project and support OLED eDP panel. TEST=check edp training pass and show log: EQ training pass BUG=b:343351631 Signed-off-by: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Change-Id: Iea610c97351beb94a49cc1044701a523b7c85a6e --- M src/mainboard/google/rauru/Kconfig M src/mainboard/google/rauru/Makefile.mk M src/mainboard/google/rauru/chromeos.c M src/mainboard/google/rauru/devicetree.cb M src/mainboard/google/rauru/gpio.h A src/mainboard/google/rauru/panel.c A src/mainboard/google/rauru/panel.h 7 files changed, 81 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/85951/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/85951?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea610c97351beb94a49cc1044701a523b7c85a6e Gerrit-Change-Number: 85951 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/mediatek: Fix register access for EINT
by Yidi Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86073?usp=email ) Change subject: soc/mediatek: Fix register access for EINT ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86073?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4fb78f974155725a91aad3a5450733d24b57af15 Gerrit-Change-Number: 86073 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 07:43:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/mediatek: Allow specifying multiple EINT base registers
by Yu-Ping Wu (Code Review) 21 Jan '25

21 Jan '25

Yu-Ping Wu has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86033?usp=email ) Change subject: soc/mediatek: Allow specifying multiple EINT base registers ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/common/eint_event.c: https://review.coreboot.org/c/coreboot/+/86033/comment/21aa288d_037b6d9a?us… : PS5, Line 20: write32p(reg[i], EINT_VALUE); Bug fixed in CB:86073 -- To view, visit https://review.coreboot.org/c/coreboot/+/86033?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Gerrit-Change-Number: 86033 Gerrit-PatchSet: 5 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 07:43:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/rauru: Enable RTC
by Yidi Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85979?usp=email ) Change subject: mb/google/rauru: Enable RTC ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85979?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I95822fc7646d41dbbc61258741a2a42988fc31d7 Gerrit-Change-Number: 85979 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 07:42:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC driver
by Yidi Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85978?usp=email ) Change subject: soc/mediatek/mt8196: Add RTC driver ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85978?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3dd337eaa3eed3012ddea300f7e04f2b63fb2daa Gerrit-Change-Number: 85978 Gerrit-PatchSet: 8 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shunxi Zhang <ot_shunxi.zhang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 07:42:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek: Fix register access for EINT
by Yu-Ping Wu (Code Review) 21 Jan '25

21 Jan '25

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86073?usp=email ) Change subject: soc/mediatek: Fix register access for EINT ...................................................................... soc/mediatek: Fix register access for EINT We should be writing to the address of reg[i], instead of the address whose value is reg[i]. Change-Id: I4fb78f974155725a91aad3a5450733d24b57af15 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/common/eint_event.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/86073/1 diff --git a/src/soc/mediatek/common/eint_event.c b/src/soc/mediatek/common/eint_event.c index 6e44b37..be13d55 100644 --- a/src/soc/mediatek/common/eint_event.c +++ b/src/soc/mediatek/common/eint_event.c @@ -17,7 +17,7 @@ int i; for (i = 0; i < port; i++) - write32p(reg[i], EINT_VALUE); + write32(&reg[i], EINT_VALUE); } void unmask_eint_event_mask(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/86073?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4fb78f974155725a91aad3a5450733d24b57af15 Gerrit-Change-Number: 86073 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: mb/google/brask/var/moli: Allow USB2 wakeups to (un)plug events in dt
by Kapil Porwal (Code Review) 21 Jan '25

21 Jan '25

Kapil Porwal has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/73706?usp=email ) Change subject: mb/google/brask/var/moli: Allow USB2 wakeups to (un)plug events in dt ...................................................................... Abandoned Cleanup patches -- To view, visit https://review.coreboot.org/c/coreboot/+/73706?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4097207e827594985a7d361030494a63a02b75e5 Gerrit-Change-Number: 73706 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com>

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coreboot-gerrit January 2025