coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

1 participants
3344 discussions

[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions
by Cliff Huang (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik. Hello Anil Kumar K, Bora Guvendik, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84104?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/common/block/pmc: Add GPE1 functions ...................................................................... soc/intel/common/block/pmc: Add GPE1 functions - Requires CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPE1 flag. - The existing static gpe functions has been renamed with gpe0. - Add gpe1 functions. - Remove functions that enables GPE events. This is not used and should not be used during boot. BUG=362310295 TEST=Build with CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPE1 flag, boot DUT, and check if GPE1 sts bits have been printed during boot. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I7ac1fbe6d45cbe0c86c3f72911900d92a186168d --- M src/soc/intel/common/block/include/intelblocks/pmclib.h M src/soc/intel/common/block/pmc/pmclib.c 2 files changed, 72 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/84104/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/84104?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ac1fbe6d45cbe0c86c3f72911900d92a186168d Gerrit-Change-Number: 84104 Gerrit-PatchSet: 8 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>

1 0

[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions
by Cliff Huang (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email ) Change subject: soc/intel/common/block/pmc: Add GPE1 functions ...................................................................... Patch Set 7: (9 comments) File src/soc/intel/common/block/pmc/pmclib.c: https://review.coreboot.org/c/coreboot/+/84104/comment/05ddc183_befa9a8d?us… : PS3, Line 406: pmc_clear_gpi_gpe0_status > > gpi_gpe0 means the general GPI event in GPE0. GPE1 only contains Intel's std events. […] Subrata, pmc_disable_all_gpe() is called in smm_southbridge_enable function in src/soc/intel/common/block/smm/smm.c. from SOC cpu.c, we have MP OPS: .pre_mp_smm_init = smm_initialize, <- NOTE: GPE STS bits are cleared here .post_mp_init = post_mp_init, <- NOTE: GPE EN bits are cleared here This should still be earlier enough. File src/soc/intel/common/block/pmc/pmclib.c: https://review.coreboot.org/c/coreboot/+/84104/comment/7fa9afc6_43c665c0?us… : PS7, Line 306: 0 > this should be NULL ? as you are returning `char *` Done https://review.coreboot.org/c/coreboot/+/84104/comment/096aedda_cd23f62a?us… : PS7, Line 341: pmc_clear_gpi_gpe0_status > sure. working on this. I do a search and only the existing gpe event disabling functions need to cover GPE1 EN bits if _HAVE_GPE1. By doing this, no _gpe_function needs to be renamed outside of pmclib.c. In addition, I delete the GPE event enable functions since not used. CB should not enable these events during boot, anyways. https://review.coreboot.org/c/coreboot/+/84104/comment/93761458_c330ea5c?us… : PS7, Line 379: gpe_sts > check the NULL pointer at line 381 Done https://review.coreboot.org/c/coreboot/+/84104/comment/73efea28_9331eb8f?us… : PS7, Line 381: int i; > drop Done https://review.coreboot.org/c/coreboot/+/84104/comment/4c6fabb1_8d2596be?us… : PS7, Line 383: i > ```int i``` Done https://review.coreboot.org/c/coreboot/+/84104/comment/78107c0a_bf24424a?us… : PS7, Line 393: int i; > same Done https://review.coreboot.org/c/coreboot/+/84104/comment/caaee312_6089af7c?us… : PS7, Line 396: sts_arr = > missing NULL check ? Done https://review.coreboot.org/c/coreboot/+/84104/comment/18023c22_27025b52?us… : PS7, Line 406: if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1)) { > WDYT […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84104?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ac1fbe6d45cbe0c86c3f72911900d92a186168d Gerrit-Change-Number: 84104 Gerrit-PatchSet: 7 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Sun, 01 Sep 2024 19:18:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Jamie Ryu <jamie.m.ryu(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

1 0

[M] Change in coreboot[main]: mb/google/brox: Fix booting to kernel without battery
by Sowmya Aralguppe (Code Review) 01 Sep '24

01 Sep '24

1 0

[M] Change in coreboot[main]: mb/google/brox: Fix booting to kernel without battery
by Sowmya Aralguppe (Code Review) 01 Sep '24

01 Sep '24

1 0

[S] Change in coreboot[main]: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
by Subrata Banik (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Paul Menzel. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email ) Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table ...................................................................... Patch Set 14: (1 comment) Patchset: PS14: Please take care of below comments below as part of PTL ramstage CLs 1. https://review.coreboot.org/c/coreboot/+/83798/comment/a009a3db_05d6844d/ 2. https://review.coreboot.org/c/coreboot/+/83798/comment/8602614e_08b1dbf2/ -- To view, visit https://review.coreboot.org/c/coreboot/+/84103?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia6928c35b86f4a2243d58597b17b2a3a5f54271e Gerrit-Change-Number: 84103 Gerrit-PatchSet: 14 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 01 Sep 2024 17:52:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[M] Change in coreboot[main]: mb/google/brox: Fix booting to kernel without battery
by Sowmya Aralguppe (Code Review) 01 Sep '24

01 Sep '24

1 0

[S] Change in coreboot[main]: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
by Subrata Banik (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Paul Menzel. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email ) Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84103?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia6928c35b86f4a2243d58597b17b2a3a5f54271e Gerrit-Change-Number: 84103 Gerrit-PatchSet: 14 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 01 Sep 2024 17:42:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[XS] Change in coreboot[main]: mb/google/brox/variants/brox: remove PL4 value modification
by Subrata Banik (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Karthik Ramasubramanian, Shelley Chen, Sumeet R.P.. Subrata Banik has posted comments on this change by Sumeet R.P.. ( https://review.coreboot.org/c/coreboot/+/83662?usp=email ) Change subject: mb/google/brox/variants/brox: remove PL4 value modification ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83662/comment/6503c3c3_b9c09ed5?us… : PS1, Line 8: : Remove PL4 value modification based on PsysPL3 valuei. : the motivation not clear? can you please give a reason why it existed before and why you are not removing this code ? trying to understand if this code ever intended to solve any problem ? -- To view, visit https://review.coreboot.org/c/coreboot/+/83662?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic7fbc6386769aa9f76a8665a742c97dfd790fd1d Gerrit-Change-Number: 83662 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R.P. <sumeet4linux(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sumeet R.P. <sumeet4linux(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sun, 01 Sep 2024 17:42:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[XS] Change in coreboot[main]: mb/google/brox/variants/brox: update pl1_min
by Subrata Banik (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Karthik Ramasubramanian, Shelley Chen, Sumeet R.P.. Subrata Banik has posted comments on this change by Sumeet R.P.. ( https://review.coreboot.org/c/coreboot/+/83661?usp=email ) Change subject: mb/google/brox/variants/brox: update pl1_min ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/83661/comment/724d171b_59c094bc?us… : PS1, Line 7: pl1_min PL1 Min https://review.coreboot.org/c/coreboot/+/83661/comment/065b59d1_1e6675b2?us… : PS1, Line 7: update Update -- To view, visit https://review.coreboot.org/c/coreboot/+/83661?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I266a78806e065bf7af0d5fcad9b22ab63aa892e2 Gerrit-Change-Number: 83661 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R.P. <sumeet4linux(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sumeet R.P. <sumeet4linux(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sun, 01 Sep 2024 17:40:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

1 0

[M] Change in coreboot[main]: mb/google/brox: Fix booting to kernel without battery
by Subrata Banik (Code Review) 01 Sep '24

01 Sep '24

Attention is currently required from: Ashish Kumar Mishra, Caveh Jalali, Dinesh Gehlot, Eric Herrmann, Forest Mittelberg, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Keith Short, Krishna P Bhat D, Nick Vaccaro, Paul Menzel, Rishika Raj, Ronak Kanabar, Shelley Chen, Sowmya Aralguppe, Sowmya Aralguppe. Subrata Banik has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/83752?usp=email ) Change subject: mb/google/brox: Fix booting to kernel without battery ...................................................................... Patch Set 19: (2 comments) File src/mainboard/google/brox/romstage.c: https://review.coreboot.org/c/coreboot/+/83752/comment/8b21c153_184572f6?us… : PS19, Line 27: MAX_NONTURBO_PERFORMANCE > at which stage, you are seeing "CPU brown out" ? romstage or ramstage ? I assume you are seeing Bootfrequency=2? > -It happens in ramstage ( FspMultiPhaseSiInit) The BSP always boots at the HFM, or P1 frequency, which is aligned with the CPU soft strap. I don't believe we need to file a bug to align with this expectation. You can dump the perf MSR to check the current frequency and compare it to the HFM. Later, during the ramstage, when we enable Turbo and try to configure Turbo for all APs, we need to draw more power to switch to the supported turbo max. Since the battery is unable to draw enough power, the CPU browns out. The best solution to this situation would be to ensure that the BIOS is not enabling Turbo or the BSP frequency is limited to HFM/P1 max. What I am saying is that the boot frequency override only makes sense at the ramstage and not at the romstage because we are already booting using P1/HFM until the romstage. This UPD is used to prevent the BSP from switching to the Turbo frequency, knowing that the power envelope is not sufficient to keep Turbo enabled. > who is setting TurboModeDisable ? I assume croeboot can always override this. > - FSP - in function VOID SetBootFrequency ( > IN SI_POLICY_PPI *SiPolicyPpi > ) > If bootfreq is set 2 - I believe the boot will start in HPM and then switch to turbo mode (by looking at the code and logs) ..If this is not the expected behavior then we should follow it up a separate bug Please read my explanation above, I'm insisting this UPD is more like ramstage specific UPD rather getting used in romstage. Because turbo freq is what ideally we wish to avoid to switch for BSP unless we have ample supply. File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c: https://review.coreboot.org/c/coreboot/+/83752/comment/d8a25daf_9ce1efd7?us… : PS19, Line 57: * PL4 calculations - For USB C charger (Max Power): > I am referring PL4 writeback in depthcharge not in the kernel. are you seeing any feature gap or issue with the functionality in this implementation ? I am repeating my questions. Why do you believe that overriding the PL4 at depthcharge would be sufficient to restore the original PL4 limit? Our boot time is less than or equal to 1 second, which is far too brief for the system to reach a stable charged state and restore the original PL4 limit. I would prefer to avoid overriding PL4 from DC and rely on the kernel to restore the PL4's original value after we have reached a stable charge state. Overriding PL4 from depthcharge may cause the same CPI brownout problem if there is insufficient fuel (which I would like to avoid). I believe I mentioned this during the call as well. ``` Low battery - Working fine with power button press Able to write back PL4 after exiting depthcharge (needs to validated on different boards) - seems to be sporadic ``` this is what you have mentioned during the previous call that overriding PL4 from depthcharge has a corner case as well. -- To view, visit https://review.coreboot.org/c/coreboot/+/83752?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433 Gerrit-Change-Number: 83752 Gerrit-PatchSet: 19 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Herrmann <eherrmann(a)google.com> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Keith Short <keithshort(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-CC: Dengwu Yu <yudengwu(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sowmya Aralguppe <sowmya.aralguppe(a)intel.corp-partner.google.com> Gerrit-CC: Vinay Kumar <vinay.kumar(a)intel.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Eric Herrmann <eherrmann(a)google.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Keith Short <keithshort(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Forest Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Sun, 01 Sep 2024 17:39:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2024