coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: soc/intel/ptl: Add GPIOs for Panther Lake SOC
by Cliff Huang (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Elyes Haouas, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83789?usp=email ) Change subject: soc/intel/ptl: Add GPIOs for Panther Lake SOC ...................................................................... Patch Set 61: (8 comments) File src/soc/intel/pantherlake/acpi/gpio.asl: https://review.coreboot.org/c/coreboot/+/83789/comment/e065482c_2374a14e?us… : PS55, Line 60: /* Device Properties for _DSD */, > These comments are generated from .asl to .dsl file by iasl. The template that we started with gpio. […] Done https://review.coreboot.org/c/coreboot/+/83789/comment/cf8229c3_b1fe2d80?us… : PS55, Line 84: 0x10 > I checked with pinctrl owner, we will remove this package. […] Done File src/soc/intel/pantherlake/include/soc/gpio_defs.h: https://review.coreboot.org/c/coreboot/+/83789/comment/ce8ca17b_d58b4750?us… : PS55, Line 257: GPP_V > can you use `_start_` in between to make it clear? […] Done File src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h: https://review.coreboot.org/c/coreboot/+/83789/comment/728f16de_519615c0?us… : PS55, Line 36: Community0 > is there any specific syntax to follow here? […] Done File src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h: https://review.coreboot.org/c/coreboot/+/83789/comment/05aef567_149d42a8?us… : PS49, Line 15: 0x1 > INC(GPP_V) Done https://review.coreboot.org/c/coreboot/+/83789/comment/34b1c11e_6efd8d26?us… : PS49, Line 36: #define GPP_COMM0_NAME "Community0" : #define GPP_COMM1_NAME "Community1" : #define GPP_COMM3_NAME "Community3" : #define GPP_COMM4_NAME "Community4" : #define GPP_COMM5_NAME "Community5" : : #define GPP_V_NAME "GPP_V" : #define GPP_C_NAME "GPP_C" : #define GPP_F_NAME "GPP_F" : #define GPP_E_NAME "GPP_E" : #define GPP_CPUJTAG_NAME "GPUJTAG" : #define GPP_H_NAME "GPP_H" : #define GPP_A_NAME "GPP_A" : #define GPP_VGPIO3_NAME "vGPIO_3" : #define GPP_S_NAME "GPP_S" : #define GPP_B_NAME "GPP_B" : #define GPP_D_NAME "GPP_D" : #define GPP_VGPIO_NAME "vGPIO" : > This are used in gpio.asl. gpio.h is not included directly in gpio.asl. Let me try. Done https://review.coreboot.org/c/coreboot/+/83789/comment/af6a9b96_7932c38f?us… : PS49, Line 58: 1 > INC(COMM_0) Done https://review.coreboot.org/c/coreboot/+/83789/comment/5e5050b7_125261da?us… : PS49, Line 250: #define NUM_COM1_GPP_GROUPS 2 > This marco is does not count the non GPP_[grp]_[num] group in a community. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/83789?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae1bc072841214efaec7a10719dbc742f2da795b Gerrit-Change-Number: 83789 Gerrit-PatchSet: 61 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 03 Sep 2024 23:45:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Add GPIOs for Panther Lake SOC
by Cliff Huang (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Elyes Haouas, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim. Hello Anil Kumar K, Bora Guvendik, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83789?usp=email to look at the new patch set (#62). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/ptl: Add GPIOs for Panther Lake SOC ...................................................................... soc/intel/ptl: Add GPIOs for Panther Lake SOC Add definitions for the GPIO pins on Panther Lake SoC, as well as GPIO IRQ routing information and supporting ACPI ASL. For now, add the following GPIO communities and GPIO groups: Comm. 0: GPP_V, GPP_C Comm. 1: GPP_F, GPP_E Comm. 3: CPUJTAG, GPP_H, GPP_A, VGPIO3 Comm. 4: GPP_S Comm. 5: GPP_B, GPP_D, VGPIO BUG=b:348678529 TEST=Verified on Intel Silicon platform for PTL using google/fatcat mainboard. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Iae1bc072841214efaec7a10719dbc742f2da795b --- M src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/acpi/gpio.asl A src/soc/intel/pantherlake/gpio.c A src/soc/intel/pantherlake/include/soc/gpio.h A src/soc/intel/pantherlake/include/soc/gpio_defs.h A src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h 6 files changed, 1,970 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/83789/62 -- To view, visit https://review.coreboot.org/c/coreboot/+/83789?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae1bc072841214efaec7a10719dbc742f2da795b Gerrit-Change-Number: 83789 Gerrit-PatchSet: 62 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>

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[XS] Change in coreboot[main]: src/include: Introducing a new SET_32_BIT_FLAG(x) macro.
by Jérémy Compostella (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Martin Roth, Pratikkumar V Prajapati, Saurabh Mishra. Jérémy Compostella has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/84142?usp=email ) Change subject: src/include: Introducing a new SET_32_BIT_FLAG(x) macro. ...................................................................... Patch Set 14: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84142/comment/f2537a85_0b9e5fd1?us… : PS14, Line 7: src/include: Introducing a new SET_32_BIT_FLAG(x) macro. Introduce -- To view, visit https://review.coreboot.org/c/coreboot/+/84142?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I70be1ccba59d25af2ba85a2014232072abf2f87d Gerrit-Change-Number: 84142 Gerrit-PatchSet: 14 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 23:09:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: inteltool: elkhartlake: keep the same names as coreboot code uses
by Alexander Couzens (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Alexander Couzens, Pratikkumar V Prajapati. Hello Pratikkumar V Prajapati, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84190?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: inteltool: elkhartlake: keep the same names as coreboot code uses ...................................................................... inteltool: elkhartlake: keep the same names as coreboot code uses coreboot doesn't have a leading zero in gpio < 10. E.g. G00 -> G0 Change-Id: I4558cec444ae2a081fbc0f49464354df222be6c9 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- M util/inteltool/gpio_names/elkhartlake.h 1 file changed, 131 insertions(+), 131 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/84190/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84190?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4558cec444ae2a081fbc0f49464354df222be6c9 Gerrit-Change-Number: 84190 Gerrit-PatchSet: 3 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com>

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[L] Change in coreboot[main]: intelp2m: add support for elkhartlake
by Alexander Couzens (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Alexander Couzens, Maxim. Hello Maxim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84191?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: intelp2m: add support for elkhartlake ...................................................................... intelp2m: add support for elkhartlake Change-Id: I0f60d182bc5cc3d0d1d1177fbda0cfe8e2279e46 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- M util/intelp2m/config/config.go M util/intelp2m/main.go M util/intelp2m/parser/parser.go A util/intelp2m/platforms/ehl/macro.go A util/intelp2m/platforms/ehl/template.go 5 files changed, 340 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/84191/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84191?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f60d182bc5cc3d0d1d1177fbda0cfe8e2279e46 Gerrit-Change-Number: 84191 Gerrit-PatchSet: 3 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu>

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[XS] Change in coreboot[main]: util/inteltool: Fix format for PCI vendor/device IDs
by Felix Singer (Code Review) 03 Sep '24

03 Sep '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84186?usp=email ) Change subject: util/inteltool: Fix format for PCI vendor/device IDs ...................................................................... util/inteltool: Fix format for PCI vendor/device IDs PCI vendor/device IDs are 16 bit. Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> Change-Id: I87804a63f04b7461d348a245531542776575eb7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/84186 Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M util/inteltool/memory.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Matt DeVillier: Looks good to me, approved Angel Pons: Looks good to me, approved build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index 3e7d3d7..ae25494 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -242,7 +242,7 @@ break; default: printf("Error: Dumping MCHBAR on this northbridge is not (yet) supported.\n"); - printf("Error: Unknown PCI id: %08x/%08x\n", nb->vendor_id, nb->device_id); + printf("Error: Unknown PCI id: %04x/%04x\n", nb->vendor_id, nb->device_id); return 1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/84186?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I87804a63f04b7461d348a245531542776575eb7a Gerrit-Change-Number: 84186 Gerrit-PatchSet: 3 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: util/inteltool: Fix format for PCI vendor/device IDs
by Felix Singer (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Alexander Couzens, Felix Held, Paul Menzel, Pratikkumar V Prajapati. Felix Singer has posted comments on this change by Alexander Couzens. ( https://review.coreboot.org/c/coreboot/+/84186?usp=email ) Change subject: util/inteltool: Fix format for PCI vendor/device IDs ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84186?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I87804a63f04b7461d348a245531542776575eb7a Gerrit-Change-Number: 84186 Gerrit-PatchSet: 2 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 03 Sep 2024 21:18:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions
by Cliff Huang (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email ) Change subject: soc/intel/common/block/pmc: Add GPE1 functions ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/common/block/pmc/pmclib.c: https://review.coreboot.org/c/coreboot/+/84104/comment/9f696cf9_bd9d733e?us… : PS7, Line 341: pmc_clear_gpi_gpe0_status > > I do a search and only the existing gpe event disabling functions need to cover GPE1 EN bits if _H […] Subrata, pmc_enable_gpe() and pmc_enable_std_gpe() are removed. GPE EN bits are enabled in kernel during boot. even if we set those bits in CB, they are over-written by kernel. -- To view, visit https://review.coreboot.org/c/coreboot/+/84104?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ac1fbe6d45cbe0c86c3f72911900d92a186168d Gerrit-Change-Number: 84104 Gerrit-PatchSet: 8 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 21:03:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Add GPIOs for Panther Lake SOC
by Cliff Huang (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Elyes Haouas, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83789?usp=email ) Change subject: soc/intel/ptl: Add GPIOs for Panther Lake SOC ...................................................................... Patch Set 61: (8 comments) File src/soc/intel/pantherlake/acpi/gpio.asl: https://review.coreboot.org/c/coreboot/+/83789/comment/33fcbc94_2bd5c2ff?us… : PS55, Line 60: /* Device Properties for _DSD */, > don't need this. […] These comments are generated from .asl to .dsl file by iasl. The template that we started with gpio.asl has these comments. Same thing to the comment on line 58. https://review.coreboot.org/c/coreboot/+/83789/comment/9ffa074b_9cc83e8a?us… : PS55, Line 84: 0x10 > can you please help me to understand what this field actually implies to ? I checked with pinctrl owner, we will remove this package. The kernel pinctrl driver does not use it. https://review.coreboot.org/c/coreboot/+/83789/comment/feb8619c_a8c3832c?us… : PS55, Line 135: GPPV > may be worth adding a comment saying, this section explains each GPIO bank, for example: GPIO_0 COM […] Acknowledged File src/soc/intel/pantherlake/include/soc/gpio_defs.h: https://review.coreboot.org/c/coreboot/+/83789/comment/d95621f0_189b4d3f?us… : PS49, Line 260: GPP_E_OFFSET > I don't see GPP_E0 in the EDS at offset 0x9a0. […] Subrata, I've asked to fix this a while back. and it got fixed in July. Can you check newer release of EDS? https://review.coreboot.org/c/coreboot/+/83789/comment/3064067e_5e7f15e3?us… : PS49, Line 261: GPP_CPUJTAG_OFFSET > do we need this macro? This is used in gpio.asl. File src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h: https://review.coreboot.org/c/coreboot/+/83789/comment/e84ec45a_1bc44880?us… : PS49, Line 31: 1 > INC(GPP_COMM0_ID) We don't have COMM2, so GPP_COMM3 cannot use this macro, though. https://review.coreboot.org/c/coreboot/+/83789/comment/76c89335_9a39113e?us… : PS49, Line 36: #define GPP_COMM0_NAME "Community0" : #define GPP_COMM1_NAME "Community1" : #define GPP_COMM3_NAME "Community3" : #define GPP_COMM4_NAME "Community4" : #define GPP_COMM5_NAME "Community5" : : #define GPP_V_NAME "GPP_V" : #define GPP_C_NAME "GPP_C" : #define GPP_F_NAME "GPP_F" : #define GPP_E_NAME "GPP_E" : #define GPP_CPUJTAG_NAME "GPUJTAG" : #define GPP_H_NAME "GPP_H" : #define GPP_A_NAME "GPP_A" : #define GPP_VGPIO3_NAME "vGPIO_3" : #define GPP_S_NAME "GPP_S" : #define GPP_B_NAME "GPP_B" : #define GPP_D_NAME "GPP_D" : #define GPP_VGPIO_NAME "vGPIO" : > move macro definition into GPIO. […] This are used in gpio.asl. gpio.h is not included directly in gpio.asl. Let me try. https://review.coreboot.org/c/coreboot/+/83789/comment/0fa6149f_b1df215f?us… : PS49, Line 250: #define NUM_COM1_GPP_GROUPS 2 > I don't see any consumer for NUM_COMx_GPP_GROUPS macro This marco is does not count the non GPP_[grp]_[num] group in a community. Initially, these are used for a KCONFIG flag not to add non GPP_[grp]_[pad] in GPIO asl. I can remove these defines. -- To view, visit https://review.coreboot.org/c/coreboot/+/83789?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae1bc072841214efaec7a10719dbc742f2da795b Gerrit-Change-Number: 83789 Gerrit-PatchSet: 61 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 03 Sep 2024 20:38:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: drivers/i2c/generic: Remove erroneous acpigen_pop_len
by Martin L Roth (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Sean Rhodes. Martin L Roth has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84197?usp=email ) Change subject: drivers/i2c/generic: Remove erroneous acpigen_pop_len ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84197?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I913022144813f7f65eac1bcb7c97656f2c513c0b Gerrit-Change-Number: 84197 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 03 Sep 2024 20:16:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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