coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: src/include: Introduce a new BIT_FLAG_32(x) macro
by Paul Menzel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Ashish Kumar Mishra, Julius Werner, Jérémy Compostella, Karthik Ramasubramanian, Martin Roth, Saurabh Mishra. Paul Menzel has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/84142?usp=email ) Change subject: src/include: Introduce a new BIT_FLAG_32(x) macro ...................................................................... Patch Set 19: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84142/comment/04699494_a79fdcd5?us… : PS19, Line 7: Introduce Next time *Define … macro* would also work. (Ignore.) -- To view, visit https://review.coreboot.org/c/coreboot/+/84142?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I70be1ccba59d25af2ba85a2014232072abf2f87d Gerrit-Change-Number: 84142 Gerrit-PatchSet: 19 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 18:26:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add Kconfig option to control MBP HOB creation
by Subrata Banik (Code Review) 04 Sep '24

04 Sep '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84217?usp=email ) Change subject: drivers/intel/fsp2_0: Add Kconfig option to control MBP HOB creation ...................................................................... drivers/intel/fsp2_0: Add Kconfig option to control MBP HOB creation This patch adds a new Kconfig option `FSP_PUBLISH_MBP_HOB` to control the creation of the ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. Disabling this option can improve boot time on platforms that do not utilize the MBP HOB, such as ChromeOS devices. The option is disabled by default on ChromeOS and enabled by default on other platforms. On ADL-P based platforms, this option is forced to be enabled as ADL-P FSP relies on MBP HOB for ChipsetInit version for ChipsetInit sync. Removed SoC specific implementation of `FSP_PUBLISH_MBP_HOB` config from MTL and TGL config file. TEST=Tested on ADL-P and ADL-N platforms. Verified that MBP HOB is created when `FSP_PUBLISH_MBP_HOB` is enabled and not created when it is disabled. Also verified that the system boots successfully in both cases. Change-Id: I21da00259c0b9bcca6f545291a6259e9cce8d900 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/soc/intel/alderlake/Kconfig M src/soc/intel/meteorlake/Kconfig M src/soc/intel/pantherlake/Kconfig 4 files changed, 16 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/84217/1 diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 2ad3209..687e6e7 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -522,4 +522,15 @@ reported with Alder Lake and Raptor Lake FSP where MultiPhaseSiInit API is unable to return any ERROR status. +config FSP_PUBLISH_MBP_HOB + bool + default n if CHROMEOS + default y + help + This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. + Disabling it for the platforms, which do not use MBP HOB, can improve the boot time. + + ChromeOS devices typically do not require the MBP information, hence it is disabled + by default on ChromeOS.. + endif diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index f7c585a..c1cc993 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -511,18 +511,13 @@ config INTEL_GMA_BCLM_WIDTH default 32 +# Note: It cannot be disabled for ADL-P based platforms because ADL-P FSP relies on +# MBP HOB for ChipsetInit version for ChipsetInit sync. As ChipsetInit sync doesn't +# occur if no MBP HOB, so it results S0ix issue. This limitation is addressed in the +# later platforms so creation of MBP HOB can be skipped for ADL-N based platforms. config FSP_PUBLISH_MBP_HOB bool - default n if CHROMEOS && (SOC_INTEL_ALDERLAKE_PCH_N) - default y - help - This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. - Disabling it for the platforms, which do not use MBP HOB, can improve the boot time. - - Note: It cannot be disabled for ADL-P based platforms because ADL-P FSP relies on - MBP HOB for ChipsetInit version for ChipsetInit sync. As ChipsetInit sync doesn't - occur if no MBP HOB, so it results S0ix issue. This limitation is addressed in the - later platforms so creation of MBP HOB can be skipped for ADL-N based platforms. + default y if !SOC_INTEL_ALDERLAKE_PCH_N config INCLUDE_HSPHY_IN_FMAP bool "Include PCIe 5.0 HSPHY firmware in flash" diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 79ef3e8..753af7c 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -380,14 +380,6 @@ hex default 0x800000 -config FSP_PUBLISH_MBP_HOB - bool - default n if CHROMEOS - default y - help - This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. - Disabling it for the platforms, which do not use MBP HOB, can improve the boot time. - config BUILDING_WITH_DEBUG_FSP bool "Debug FSP is used for the build" default n diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index 9a5fc61..e5f7c92 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -248,12 +248,4 @@ help Set this option if debug build of FSP is used. -config FSP_PUBLISH_MBP_HOB - bool - default n if CHROMEOS - default y - help - This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. - Disabling it for the platforms, which do not use MBP HOB, can improve the boot time. - endif -- To view, visit https://review.coreboot.org/c/coreboot/+/84217?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21da00259c0b9bcca6f545291a6259e9cce8d900 Gerrit-Change-Number: 84217 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: drivers/i2c/generic: Remove erroneous acpigen_pop_len
by Paul Menzel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Sean Rhodes. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84197?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: drivers/i2c/generic: Remove erroneous acpigen_pop_len ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84197/comment/3f618dd8_0cfa95f1?us… : PS3, Line 10: an EMERG warning Paste the warning? -- To view, visit https://review.coreboot.org/c/coreboot/+/84197?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I913022144813f7f65eac1bcb7c97656f2c513c0b Gerrit-Change-Number: 84197 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 04 Sep 2024 18:22:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox/var/lotso: disable RTS5227 PCIE L0s support
by Paul Menzel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Jian Tong, Karthik Ramasubramanian, Subrata Banik. Paul Menzel has posted comments on this change by Jian Tong. ( https://review.coreboot.org/c/coreboot/+/84177?usp=email ) Change subject: mb/google/brox/var/lotso: disable RTS5227 PCIE L0s support ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84177/comment/a4a9fb2d_af1e7ae7?us… : PS3, Line 9: Because of RTS5227 don't support L0s, so set to ASPM_L1. What is the result of that? Errors in the log? Non-working device? Then maybe: > According to X the RTS5227 does not support L0s, so set it to ASPM_L1. https://review.coreboot.org/c/coreboot/+/84177/comment/e42195d3_8656a9de?us… : PS3, Line 12: TEST=emerge-brox sys-boot/coreboot sys-boot/chromeos-bootimage How can the change be verified? -- To view, visit https://review.coreboot.org/c/coreboot/+/84177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I87bb0d195566d273951dee6eeb54c9b388dd7607 Gerrit-Change-Number: 84177 Gerrit-PatchSet: 3 Gerrit-Owner: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 18:21:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox/var/lotso: remove unused cam enable_gpio
by Paul Menzel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Jian Tong, Kun Liu, Shelley Chen. Paul Menzel has posted comments on this change by Jian Tong. ( https://review.coreboot.org/c/coreboot/+/84198?usp=email ) Change subject: mb/google/brox/var/lotso: remove unused cam enable_gpio ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84198?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id8f30597ef9bceb9bdd4a3267266f1d189aa6fd8 Gerrit-Change-Number: 84198 Gerrit-PatchSet: 3 Gerrit-Owner: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 18:19:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: Makefile.mk: compile ECC tools and inject ECC to final image
by Paul Menzel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Felix Singer, Krystian Hebel, Sergii Dmytruk. Paul Menzel has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/coreboot/+/67064?usp=email ) Change subject: Makefile.mk: compile ECC tools and inject ECC to final image ...................................................................... Patch Set 40: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/67064/comment/79bb0cbc_000d9ff0?us… : PS40, Line 8: > You could add … the output of `cbfstool coreboot.rom print`. PS: Internet was broken in OSFC? -- To view, visit https://review.coreboot.org/c/coreboot/+/67064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8541aa6f1429ed6143830ed11c47c150183ddf0d Gerrit-Change-Number: 67064 Gerrit-PatchSet: 40 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 18:00:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: Makefile.mk: compile ECC tools and inject ECC to final image
by Paul Menzel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Felix Singer, Krystian Hebel, Sergii Dmytruk. Paul Menzel has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/coreboot/+/67064?usp=email ) Change subject: Makefile.mk: compile ECC tools and inject ECC to final image ...................................................................... Patch Set 40: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/67064/comment/8858bcd2_5a7ff5db?us… : PS40, Line 8: You could add -- To view, visit https://review.coreboot.org/c/coreboot/+/67064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8541aa6f1429ed6143830ed11c47c150183ddf0d Gerrit-Change-Number: 67064 Gerrit-PatchSet: 40 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 17:59:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER
by Krystian Hebel (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Arthur Heymans, Elyes Haouas, Sergii Dmytruk. Krystian Hebel has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/coreboot/+/67065?usp=email ) Change subject: 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER ...................................................................... Patch Set 42: Code-Review+2 (1 comment) File src/soc/ibm/power9/Makefile.mk: https://review.coreboot.org/c/coreboot/+/67065/comment/b08280aa_0ee5bfff?us… : PS39, Line 17: ifneq ($(CONFIG_SIGNING_KEYS_DIR),"") > I thought I undone it after considering swapping branches. I thought I updated commit message too.. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/67065?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id88baef5ecb1f8ffd74a7f464bbbaaaea0ca643d Gerrit-Change-Number: 67065 Gerrit-PatchSet: 42 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 04 Sep 2024 17:56:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Hardcode IOM_BASE_ADDR_MAX value
by Subrata Banik (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Cliff Huang, Jérémy Compostella, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84216?usp=email ) Change subject: soc/intel/pantherlake: Hardcode IOM_BASE_ADDR_MAX value ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/84216/comment/5c0ff38c_62b1d370?us… : PS1, Line 88: #define IOM_BASE_ADDR_MAX 0x401080ffff ```suggestion #define IOM_BASE_ADDR_MAX 0x401080ffff /* ((IOM_BASE_ADDR + IOM_BASE_SIZE) - 1) */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/84216?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f16 Gerrit-Change-Number: 84216 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 17:49:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox: Increase PL1 Min and remove PL4 modification
by Sowmya Aralguppe (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel, Shelley Chen, Subrata Banik, Sumeet R.P.. Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/84185?usp=email ) Change subject: mb/google/brox: Increase PL1 Min and remove PL4 modification ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > This patch is the same of earlier patches submitted for review https://review.coreboot. […] Sure could you please rebase your patch and address all the review comment .I will abandon mine -- To view, visit https://review.coreboot.org/c/coreboot/+/84185?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib65b517c4cdba04b7e4d15b729ae782f0662717e Gerrit-Change-Number: 84185 Gerrit-PatchSet: 4 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sumeet R.P. <sumeet4linux(a)gmail.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sumeet R.P. <sumeet4linux(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 17:46:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sumeet R.P. <sumeet4linux(a)gmail.com>

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coreboot-gerrit September 2024