coreboot-gerrit September 2024

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[S] Change in coreboot[main]: i945: Use nullptr instead of NULL
by Elyes Haouas (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Alexander Couzens, Evgeny Zinoviev. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/83860?usp=email ) Change subject: i945: Use nullptr instead of NULL ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: This needs 84489# -- To view, visit https://review.coreboot.org/c/coreboot/+/83860?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d47e692a33d739345a81f589d4329a31beeb8c5 Gerrit-Change-Number: 83860 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sat, 28 Sep 2024 08:41:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: tree: Add kconfig option for C23 dialect
by Elyes Haouas (Code Review) 28 Sep '24

28 Sep '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84489?usp=email to look at the new patch set (#6). Change subject: tree: Add kconfig option for C23 dialect ...................................................................... tree: Add kconfig option for C23 dialect This adds C23 dialect for testing and prepar for C23 support. Change-Id: I6fbfb1bd3ca2ae0e216023f54de792f7cbd5f50c Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M Makefile.mk M src/Kconfig 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/84489/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/84489?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6fbfb1bd3ca2ae0e216023f54de792f7cbd5f50c Gerrit-Change-Number: 84489 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: i945: Use nullptr instead of NULL
by Elyes Haouas (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Alexander Couzens, Evgeny Zinoviev. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/83860?usp=email ) Change subject: i945: Use nullptr instead of NULL ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/83860/comment/375da0f5_c1e03c33?us… : PS4, Line 7: [Prepare for C23] > I'd probably remove the C23 text since it doesn't seem to be completely accurate. […] Done https://review.coreboot.org/c/coreboot/+/83860/comment/da97b22f_a88e9510?us… : PS4, Line 10: > Maybe mention that nullptr was introduced in C11 spec and gcc 4.7. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/83860?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d47e692a33d739345a81f589d4329a31beeb8c5 Gerrit-Change-Number: 83860 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sat, 28 Sep 2024 08:39:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com>

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[S] Change in coreboot[main]: tree: Add kconfig option for e C23 dialect
by Elyes Haouas (Code Review) 28 Sep '24

28 Sep '24

Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/84489?usp=email ) Change subject: tree: Add kconfig option for e C23 dialect ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/84489?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6fbfb1bd3ca2ae0e216023f54de792f7cbd5f50c Gerrit-Change-Number: 84489 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 28 Sep 2024 08:34:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: tree: Introduce nullptr constant
by Elyes Haouas (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Jakub Czapiga, Martin L Roth, Nico Huber. Hello Jakub Czapiga, Martin L Roth, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83459?usp=email to look at the new patch set (#22). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: tree: Introduce nullptr constant ...................................................................... tree: Introduce nullptr constant GCC-13 introduced the nullptr constant. Use it when compiling with the C23 standard. Change-Id: I07db866bebfd25f1a60d18a3228ada2957500234 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/include/stddef.h 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/83459/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/83459?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I07db866bebfd25f1a60d18a3228ada2957500234 Gerrit-Change-Number: 83459 Gerrit-PatchSet: 22 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com>

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[S] Change in coreboot[main]: soc/amd/glinda: Update pci int defs
by Paul Menzel (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Ana Carolina Cabral, Felix Held, Fred Reitberger, Jason Glenesk, Maximilian Brune. Paul Menzel has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84375?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/amd/glinda: Update pci int defs ...................................................................... Patch Set 5: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84375/comment/f09fb742_d4ef499c?us… : PS5, Line 8: A summary of the changes would be nice. https://review.coreboot.org/c/coreboot/+/84375/comment/d43840f5_a0e27237?us… : PS5, Line 11: Were you able to boot test this? -- To view, visit https://review.coreboot.org/c/coreboot/+/84375?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I843e5e2b01301eb02cb5be347e122cffbe76d80d Gerrit-Change-Number: 84375 Gerrit-PatchSet: 5 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Ana Carolina Cabral Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 28 Sep 2024 08:09:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/amd/glinda-phoenix: Update pci int defs
by Paul Menzel (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Maximilian Brune. Paul Menzel has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84574?usp=email ) Change subject: soc/amd/glinda-phoenix: Update pci int defs ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: Thank you for doing this. Commit Message: https://review.coreboot.org/c/coreboot/+/84574/comment/068a85d0_3e523571?us… : PS2, Line 11: It’d still be nice, if you summarized the change. In this case two macros seem to be updated? -- To view, visit https://review.coreboot.org/c/coreboot/+/84574?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I64f685e507e1cd5ee90e1b18526b9d59ed4c1b34 Gerrit-Change-Number: 84574 Gerrit-PatchSet: 2 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 28 Sep 2024 08:04:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: util/lint: Use bigint for hexadecimal values in handle_range
by Paul Menzel (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Karthik Ramasubramanian, Martin L Roth, Subrata Banik. Paul Menzel has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84575?usp=email ) Change subject: util/lint: Use bigint for hexadecimal values in handle_range ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84575/comment/105f53f8_0e465643?us… : PS2, Line 10: ( 64-bit Remove space after (? -- To view, visit https://review.coreboot.org/c/coreboot/+/84575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I402bb9bec9ba5bfb79b4185f35228c41d4a7b674 Gerrit-Change-Number: 84575 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sat, 28 Sep 2024 07:50:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoga: Change configure_ext_fivr value
by Roger Wang (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Roger Wang has posted comments on this change by Roger Wang. ( https://review.coreboot.org/c/coreboot/+/84573?usp=email ) Change subject: mb/google/nissa/var/pujjoga: Change configure_ext_fivr value ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > isn't there a power impact w/ this suggested change ? From Intel suggestion : VNNbypass for Pujjoga is FIVR, as current setting is FIVR, should change the setting to "0" config->ext_fivr_settings.configure_ext_fivr (1 means MBVR, 0 means FIVR) -- To view, visit https://review.coreboot.org/c/coreboot/+/84573?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb51a431ba6c6089d5c9d29adad9ab2a67979447 Gerrit-Change-Number: 84573 Gerrit-PatchSet: 1 Gerrit-Owner: Roger Wang <roger2.wang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Nikki Huang <nikki.huang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sat, 28 Sep 2024 07:42:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: amdfwtool: Set alignment of FWs in BIOS table as 0x1000
by Bao Zheng (Code Review) 28 Sep '24

28 Sep '24

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/84580?usp=email to review the following change. Change subject: amdfwtool: Set alignment of FWs in BIOS table as 0x1000 ...................................................................... amdfwtool: Set alignment of FWs in BIOS table as 0x1000 For A/B recovery, the FWs should be align with SPI sector size. So they can be erased and updated independently. Change-Id: I7f36acbf42afdc7a9bdd0f25d2352c731496dc4d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/84580/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index ce164bc..e76f41d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1509,7 +1509,7 @@ SET_ADDR_MODE_BY_TABLE(biosdir); memset(BUFF_CURRENT(*ctx), 0xff, biosdir->entries[count].size); - adjust_current_pointer(ctx, biosdir->entries[count].size, 0x100U); + adjust_current_pointer(ctx, biosdir->entries[count].size, TABLE_ALIGNMENT); break; case AMD_BIOS_APOB: biosdir->entries[count].size = fw_table[i].size; @@ -1576,7 +1576,7 @@ biosdir->entries[count].address_mode = SET_ADDR_MODE(biosdir, AMD_ADDR_REL_TAB); - adjust_current_pointer(ctx, bytes, 0x100U); + adjust_current_pointer(ctx, bytes, TABLE_ALIGNMENT); break; case AMD_BIOS_PSP_SHARED_MEM: biosdir->entries[count].dest = fw_table[i].dest; @@ -1604,7 +1604,7 @@ ctx->biosdir2_b == NULL) *(uint8_t *)BUFF_CURRENT(*ctx) = 0xFF; - adjust_current_pointer(ctx, bytes, 0x100U); + adjust_current_pointer(ctx, bytes, TABLE_ALIGNMENT); if (fw_table[i].type == AMD_BIOS_APCB && !cb_config->have_apcb_bk) { size = biosdir->entries[count].size; source = biosdir->entries[count].source; -- To view, visit https://review.coreboot.org/c/coreboot/+/84580?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7f36acbf42afdc7a9bdd0f25d2352c731496dc4d Gerrit-Change-Number: 84580 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao

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coreboot-gerrit September 2024