Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84575?usp=email )
Change subject: util/lint: Use bigint for hexadecimal values in handle_range
......................................................................
util/lint: Use bigint for hexadecimal values in handle_range
The `handle_range` function in `kconfig_lint` was failing to correctly
handle large hexadecimal values ( 64-bit value) due to limitations with
Perl's handling of standard integers.
This commit modifies the function to use the `bigint` pragma, enabling
it to handle arbitrarily large integers. This prevents issues with
64-bit hexadecimal values and ensures accurate comparisons for range
validation.
Change-Id: I402bb9bec9ba5bfb79b4185f35228c41d4a7b674
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M util/lint/kconfig_lint
1 file changed, 5 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/84575/1
diff --git a/util/lint/kconfig_lint b/util/lint/kconfig_lint
index 43b1630..b051dd9 100755
--- a/util/lint/kconfig_lint
+++ b/util/lint/kconfig_lint
@@ -856,12 +856,14 @@
my $expression;
( $range2, $expression ) = handle_if_line( $range2, $inside_config, $filename, $line_no );
+ # Use bigint for large hexadecimal values
+ use bigint;
$range1 =~ /^\s*(?:0x)?([A-Fa-f0-9]+)\s*$/;
- my $checkrange1 = $1;
+ my $checkrange1 = Math::BigInt->new($1);
$range2 =~ /^\s*(?:0x)?([A-Fa-f0-9]+)\s*$/;
- my $checkrange2 = $1;
+ my $checkrange2 = Math::BigInt->new($1);
- if ( $checkrange1 && $checkrange2 && ( hex($checkrange1) > hex($checkrange2) ) ) {
+ if ( $checkrange1 && $checkrange2 && ( $checkrange1 > $checkrange2 ) ) {
show_error("Range entry in $filename line $line_no value 1 ($range1) is greater than value 2 ($range2).");
}
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Gerrit-Change-Number: 84575
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Attention is currently required from: Andrey Petrov, Christian Walter, David Hendricks, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Lean Sheng Tan, Nick Vaccaro, Nico Huber, Pranava Y N, Ronak Kanabar, Sean Rhodes, Tarun, Werner Zeh.
Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84572?usp=email )
Change subject: soc/intel: Deprecate SoC-specific global reset status configs
......................................................................
Patch Set 4:
(2 comments)
Patchset:
PS4:
> I believe the approach of executing concerned reset(cold/warm/global) on reset HOB with associated status is better than intermediate mapping - no need for configuring coreboot/SoC reset status.
We discussed this with FSP arch before, and we should follow up on relying on Reset HOB instead of static mapping. However, the FSP spec doesn't currently document this reset HOB, so it's considered a private HOB. To comply with the FSP spec, coreboot should only use a HOB that's made public and documented in the spec. Right now, we're using this HOB as a workaround for an issue. If we think relying on the HOB is a better approach, we should request that the reset HOB be added to the future FSP spec.
>
> But I will leave it to the community inputs.
File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/84572/comment/82937651_2e14bbb1?us… :
PS4, Line 346: depends on SOC_INTEL_COMMON_FSP_RESET
> range 0x4000000000000003 0x4000000000000008 if !PLATFORM_USES_FSP2_X86_32 […]
Acknowledged
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Hello Andrey Petrov, Christian Walter, David Hendricks, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Lean Sheng Tan, Nick Vaccaro, Nico Huber, Pranava Y N, Ronak Kanabar, Sean Rhodes, Tarun, Werner Zeh, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84572?usp=email
to look at the new patch set (#5).
The following approvals got outdated and were removed:
Code-Review+1 by David Hendricks, Verified+1 by build bot (Jenkins)
Change subject: soc/intel: Deprecate SoC-specific global reset status configs
......................................................................
soc/intel: Deprecate SoC-specific global reset status configs
This change removes the SoC-specific `FSP_STATUS_GLOBAL_RESET_REQUIRED_X`
Kconfigs, as they are no longer necessary for handling FSP global reset
requests.
Previously, these Kconfigs were used to select a specific 32-bit reset
status code. However, with the introduction of FSP 2.4 and 64-bit
interfaces, the global reset status code can now vary between
architectures.
To address this, the FSP driver now sets the `FSP_STATUS_GLOBAL_RESET`
config to a common default value (depending upon most commonly used
global reset status code) based on the interface:
- 0x40000003 for 32-bit FSP interfaces
- 0x4000000000000003 for 64-bit FSP interfaces
This default can be overridden if an FSP implementation uses a
different status code (for example: Apollo Lake selects different FSP
reset status code as 0x40000005).
By removing the SoC-specific configurations, this change simplifies
global reset handling and ensures compatibility across different FSP
versions and platforms.
Below table shows the relationship between Platform, FSP and FSP Global
Reset Status:
+-----------------+--------------+-------------------------+
| Platform | FSP | Global Reset Status |
+-----------------+--------------+-------------------------+
| Alder Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Apollo Lake | 32-bit | 0x40000005 |
+-----------------+--------------+-------------------------+
| Cannon Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Elkhart Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Jasper Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Meteor Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Sky Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Tiger Lake | 32-bit | 0x40000003 |
+-----------------+--------------+-------------------------+
| Panther Lake | 64-bit | 0x4000000000000003 |
+-----------------+--------------+-------------------------+
BUG=b:347669091
TEST=Verified FSP requested global reset functionality on google/rex0
(32-bit) and google/rex64 (64-bit) platforms.
w/ 32-bit FSP:
```
(Wdt) AllowKnownReset
[FspResetSystem2] FSP Reset Initiated
FSP returning control to Bootloader with reset required return status
40000003
FSPS, status=0x40000003
FSP: handling reset type, status=0x40000003
GLOBAL RESET!
global_reset() called!
HECI: Global Reset(Type:1) Command
```
w/ 64-bit FSP:
```
(Wdt) AllowKnownReset
[FspResetSystem2] FSP Reset Initiated
FSP returning control to Bootloader with reset required return status 3
FSPS, status=0x4000000000000003
FSP: handling reset type, status=0x4000000000000003
GLOBAL RESET!
global_reset() called!
HECI: Global Reset(Type:1) Command
```
Change-Id: I32bdbf7ea6afa7d5e5f91ea96d887719d26a593f
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/drivers/intel/fsp2_0/Kconfig
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/pantherlake/Kconfig
M src/soc/intel/skylake/Kconfig
M src/soc/intel/tigerlake/Kconfig
10 files changed, 25 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/84572/5
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Jérémy Compostella has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/84558?usp=email )
Change subject: [RFC] soc/intel/fsp_reset: Drop global-reset sanity check
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/fsp_reset.c:
https://review.coreboot.org/c/coreboot/+/84558/comment/e73dd5c4_8d645b22?us… :
PS1, Line 78: /* Use RESET_REQUIRED_3 status for global resets. Needs
: to be kept in sync with chipset_handle_reset() above. */
: return FSP_STATUS_RESET_REQUIRED_3;
> I like the idea of getting rid of the check as a simplification of the code as this is the only type […]
but then, of course, this long list of changes raises the question: are we really simplifying anything ?
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Change subject: [RFC] soc/intel/fsp_reset: Drop global-reset sanity check
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/fsp_reset.c:
https://review.coreboot.org/c/coreboot/+/84558/comment/4c725227_69021bb0?us… :
PS1, Line 78: /* Use RESET_REQUIRED_3 status for global resets. Needs
: to be kept in sync with chipset_handle_reset() above. */
: return FSP_STATUS_RESET_REQUIRED_3;
> > I believe that the global-reset check inside chipset_handle_reset() doesn't add much value, since […]
I like the idea of getting rid of the check as a simplification of the code as this is the only type of reset remaining. If it turns out we need to have a check later, there is always room to re-introduce one.
The issue in my opinion is that the FSP status for global reset is not 100% stable across generations and `EFI_RESET_TYPE` does not offer a well identified global reset option.
So to get rid of the check, I would suggest to re-architecture a bit further:
1. Have our own reset type `enum reset_type { warm, cold, global, none }` or `enum soc_reset_type` ?
2. Return this type in `fsp_get_pch_reset_status()`.
3. Have a `fsp_status_to_reset_type()` function converting a reset status to a `enum reset_type`
4. Simplify `fsp_handle_reset()`:
1. Use `fsp_status_to_reset_type()`
2. print the actual type of reset (warm, cold or global) instead of the status (which is my opinion is an improvement)
3. Call `global_reset()` directly ? Why do we call `chipset_handle_reset()` in the first place ?
Just my two cents.
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Karthik Ramasubramanian has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/84412?usp=email )
Change subject: mb/google/brox/var/lotso: Fix goodix touchscreen power off sequence
......................................................................
Patch Set 7: Code-Review+2
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Change subject: soc/intel: Deprecate SoC-specific global reset status configs
......................................................................
Patch Set 4:
(2 comments)
Patchset:
PS4:
I believe the approach of executing concerned reset(cold/warm/global) on reset HOB with associated status is better than intermediate mapping - no need for configuring coreboot/SoC reset status.
But I will leave it to the community inputs.
File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/84572/comment/c26c9f49_782be684?us… :
PS4, Line 346: depends on SOC_INTEL_COMMON_FSP_RESET
range 0x4000000000000003 0x4000000000000008 if !PLATFORM_USES_FSP2_X86_32
range 0x40000003 0x40000008
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Change subject: soc/intel: Deprecate SoC-specific global reset status configs
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Patch Set 4: Code-Review+1
(1 comment)
Patchset:
PS4:
This appears to be a modified version of CB:84356, which AIU made similar changes to get rid of Kconfig variables. Both are a step in the right direction IMO, and some clean-up is better than none.
So, I propose getting this patch merged and then following-up with further re-architecting of the FSP reset handling code if needed, e.g. using one of Subrata's other patches pending clarification from Intel on the spec.
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Change subject: soc/intel: Deprecate SoC-specific global reset status configs
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Patch Set 4:
(1 comment)
Patchset:
PS3:
> > I am glad we are getting of these unnecessary Kconfig but disappointed we are still using hardcode […]
I know your opinion and I totally disagree with it.
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