coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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3913 discussions

[XS] Change in coreboot[main]: cpu/x86/64bit: Specify linker to be used
by Nico Huber (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Arthur Heymans, Jérémy Compostella. Nico Huber has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84057?usp=email ) Change subject: cpu/x86/64bit: Specify linker to be used ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84057/comment/d43cb88e_aa71eeb9?us… : PS3, Line 7: cpu/x86/64bit: Specify linker to be used It's just too ambiguous, IMO. One could easily be fooled to believe that this is about all x86_64 linking. Please mention PT. -- To view, visit https://review.coreboot.org/c/coreboot/+/84057?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I66fb374a456ea752a97a41426c5a98e6747f3a92 Gerrit-Change-Number: 84057 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 27 Aug 2024 09:11:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: libpayload/Makefile.payload: Add lto flags
by Nico Huber (Code Review) 27 Aug '24

27 Aug '24

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84015?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: libpayload/Makefile.payload: Add lto flags ...................................................................... libpayload/Makefile.payload: Add lto flags Change-Id: If4496e300dd239b8652285bab05c2f68a51b4437 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84015 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M payloads/libpayload/Makefile.payload 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Nico Huber: Looks good to me, approved build bot (Jenkins): Verified diff --git a/payloads/libpayload/Makefile.payload b/payloads/libpayload/Makefile.payload index d2860bf..2eafd4b 100644 --- a/payloads/libpayload/Makefile.payload +++ b/payloads/libpayload/Makefile.payload @@ -85,6 +85,9 @@ CFLAGS = $(CFLAGS_$(ARCH)) CFLAGS += -Os -ffreestanding CFLAGS += -Wall -Wextra -Wmissing-prototypes -Wvla -Werror +ifeq ($(CONFIG_LP_LTO),y) +CFLAGS += -flto +endif # `lpgcc` in in-tree mode: LPGCC = CC="$(CCACHE) $(CC_$(ARCH))" -- To view, visit https://review.coreboot.org/c/coreboot/+/84015?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If4496e300dd239b8652285bab05c2f68a51b4437 Gerrit-Change-Number: 84015 Gerrit-PatchSet: 9 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: libpayload: Set reasonable arch defaults
by Nico Huber (Code Review) 27 Aug '24

27 Aug '24

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84014?usp=email ) Change subject: libpayload: Set reasonable arch defaults ...................................................................... libpayload: Set reasonable arch defaults This makes it easy to switch between x86_32 and x86_64 in payloads. Change-Id: I3ac5f24d83dc80db924e92b53403c477e6256c44 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84014 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M payloads/coreinfo/Makefile M payloads/libpayload/Makefile.payload M payloads/nvramcui/Makefile 3 files changed, 14 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 9655e24..c8bf8f0 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -19,8 +19,6 @@ OBJS = $(patsubst %,$(obj)/%,$(OBJECTS)) TARGET = $(obj)/coreinfo.elf -ARCH := x86_32 - all: real-all include ../libpayload/Makefile.payload diff --git a/payloads/libpayload/Makefile.payload b/payloads/libpayload/Makefile.payload index 9366987..d2860bf 100644 --- a/payloads/libpayload/Makefile.payload +++ b/payloads/libpayload/Makefile.payload @@ -32,14 +32,8 @@ obj ?= build -ARCH ?= OBJS ?= CCACHE ?= - -CFLAGS = $(CFLAGS_$(ARCH)) -CFLAGS += -Os -ffreestanding -CFLAGS += -Wall -Wextra -Wmissing-prototypes -Wvla -Werror - STRIP ?= debug $(TARGET): @@ -78,6 +72,20 @@ Restarting the build should fix that, or explain the problem.) endif +ifeq ($(CONFIG_LP_ARCH_ARM),y) +ARCH ?= arm +else ifeq ($(CONFIG_LP_ARCH_X86_64),y) +ARCH ?= x86_64 +else ifeq ($(CONFIG_LP_ARCH_X86_32),y) +ARCH ?= x86_32 +else ifeq ($(CONFIG_LP_ARCH_ARM64),y) +ARCH ?= arm64 +endif + +CFLAGS = $(CFLAGS_$(ARCH)) +CFLAGS += -Os -ffreestanding +CFLAGS += -Wall -Wextra -Wmissing-prototypes -Wvla -Werror + # `lpgcc` in in-tree mode: LPGCC = CC="$(CCACHE) $(CC_$(ARCH))" LPGCC += _OBJ="$(LIBPAYLOAD_OBJ)" diff --git a/payloads/nvramcui/Makefile b/payloads/nvramcui/Makefile index cfe279b..a0662cf 100644 --- a/payloads/nvramcui/Makefile +++ b/payloads/nvramcui/Makefile @@ -1,6 +1,5 @@ unexport $(COREBOOT_EXPORTS) -ARCH = x86_32 OBJS = $(obj)/nvramcui.o TARGET = $(obj)/nvramcui.elf -- To view, visit https://review.coreboot.org/c/coreboot/+/84014?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ac5f24d83dc80db924e92b53403c477e6256c44 Gerrit-Change-Number: 84014 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: libpayload: Set reasonable arch defaults
by Nico Huber (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Arthur Heymans. Nico Huber has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84014?usp=email ) Change subject: libpayload: Set reasonable arch defaults ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84014?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ac5f24d83dc80db924e92b53403c477e6256c44 Gerrit-Change-Number: 84014 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 27 Aug 2024 09:06:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brya/var/nova: Configure scaler I2C GPIOs
by Kenneth Chan (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Rishika Raj. Kenneth Chan has posted comments on this change by Kenneth Chan. ( https://review.coreboot.org/c/coreboot/+/84091?usp=email ) Change subject: mb/google/brya/var/nova: Configure scaler I2C GPIOs ...................................................................... Patch Set 4: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84091/comment/856f9457_ec5c3388?us… : PS3, Line 7: Add scaler I2C configuration > Maybe: Configure scaler I2C GPIOs Done https://review.coreboot.org/c/coreboot/+/84091/comment/839c7feb_4e1dca88?us… : PS3, Line 9: pins(PCH_I2C_SCALER_SDA/SDL) > Please add a space before the (. Done https://review.coreboot.org/c/coreboot/+/84091/comment/ae51f135_286a37d6?us… : PS3, Line 10: > Please document the source like the schematics. Done https://review.coreboot.org/c/coreboot/+/84091/comment/7f5c9828_61b3f9da?us… : PS3, Line 12: TEST=emerge-constitution coreboot chromeos-bootimage > How can your change be verified? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id831f594d6a57ed10867ae5ba05ae98c90ac7d9b Gerrit-Change-Number: 84091 Gerrit-PatchSet: 4 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 27 Aug 2024 08:59:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/brya/var/nova: Configure scaler I2C GPIOs
by Kenneth Chan (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Kenneth Chan, Nick Vaccaro, Rishika Raj. Hello David Wu, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84091?usp=email to look at the new patch set (#4). Change subject: mb/google/brya/var/nova: Configure scaler I2C GPIOs ...................................................................... mb/google/brya/var/nova: Configure scaler I2C GPIOs According to schematics, add GPP_H4/H5 configuration for scaler I2C pins (PCH_I2C_SCALER_SDA/SDL). BUG=b:358439747 TEST=emerge-constitution coreboot chromeos-bootimage. Build successfully and boot to verify I2C. Change-Id: Id831f594d6a57ed10867ae5ba05ae98c90ac7d9b Signed-off-by: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/nova/gpio.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/84091/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/84091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id831f594d6a57ed10867ae5ba05ae98c90ac7d9b Gerrit-Change-Number: 84091 Gerrit-PatchSet: 4 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com>

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[XS] Change in coreboot[main]: arch/arm: Fix building with LTO
by Nico Huber (Code Review) 27 Aug '24

27 Aug '24

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84005?usp=email ) Change subject: arch/arm: Fix building with LTO ...................................................................... arch/arm: Fix building with LTO With LTO clang cannot find the aliased symbols. Change-Id: I3d89c093cee2636e648987a06afb0d325b1d96ff Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84005 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/arch/arm/Makefile.mk 1 file changed, 4 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/arch/arm/Makefile.mk b/src/arch/arm/Makefile.mk index 3f8232f..ef87dcf 100644 --- a/src/arch/arm/Makefile.mk +++ b/src/arch/arm/Makefile.mk @@ -19,6 +19,10 @@ @printf " CC $(subst $(obj)/,,$(@))\n" $(CC_arm) -I. $(CPPFLAGS_arm) -c -o $@ $< -marm +# Clang LTO does not like the aliasing in here. +TARGETS := decompressor bootblock verstage romstage ramstage rmodules_arm +$(foreach target,$(TARGETS),$(eval $(call src-to-obj,$(target),$(dir)/eabi_compat.c): CFLAGS_$(target) += -fno-lto)) + endif # CONFIG_ARCH_ARM ############################################################################### -- To view, visit https://review.coreboot.org/c/coreboot/+/84005?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3d89c093cee2636e648987a06afb0d325b1d96ff Gerrit-Change-Number: 84005 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: arch/arm: Fix building with LTO
by Nico Huber (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Arthur Heymans, Julius Werner. Nico Huber has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84005?usp=email ) Change subject: arch/arm: Fix building with LTO ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84005?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3d89c093cee2636e648987a06afb0d325b1d96ff Gerrit-Change-Number: 84005 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 27 Aug 2024 08:58:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: dsm:dsm test [not to merge]. To test
by Poornima Tom (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Poornima Tom, Poornima Tom. Hello Poornima Tom, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84096?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: dsm:dsm test [not to merge]. To test ...................................................................... dsm:dsm test [not to merge]. To test Change-Id: I979ddb5a9993a491ea48edaaf2a5ad2653430799 Signed-off-by: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com> --- M src/drivers/wifi/generic/acpi.c 1 file changed, 14 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/84096/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I979ddb5a9993a491ea48edaaf2a5ad2653430799 Gerrit-Change-Number: 84096 Gerrit-PatchSet: 3 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
by Saurabh Mishra (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Cliff Huang, Kapil Porwal, Pranava Y N, Subrata Banik. Hello Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83798?usp=email to look at the new patch set (#54). Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage ...................................................................... soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage List of changes: 1. Add required SoC programming till ramstage. 2. Include only required headers into include/soc. 3. Skeleton code used to call FSP-S API. BUG=b:348678529 TEST=Verified on Intel® Simics® Pre Silicon Simulation platform for PTL using google/fatcat mainboard. Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/soc/intel/pantherlake/Kconfig M src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/acpi.c A src/soc/intel/pantherlake/chip.c M src/soc/intel/pantherlake/chip.h M src/soc/intel/pantherlake/chipset.cb A src/soc/intel/pantherlake/cpu.c A src/soc/intel/pantherlake/crashlog.c A src/soc/intel/pantherlake/cse_telemetry.c A src/soc/intel/pantherlake/elog.c A src/soc/intel/pantherlake/finalize.c A src/soc/intel/pantherlake/fsp_params.c A src/soc/intel/pantherlake/gspi.c A src/soc/intel/pantherlake/i2c.c A src/soc/intel/pantherlake/include/soc/cpu.h A src/soc/intel/pantherlake/include/soc/crashlog.h A src/soc/intel/pantherlake/include/soc/dptf.h M src/soc/intel/pantherlake/include/soc/iomap.h A src/soc/intel/pantherlake/include/soc/irq.h A src/soc/intel/pantherlake/include/soc/itss.h A src/soc/intel/pantherlake/include/soc/nvs.h M src/soc/intel/pantherlake/include/soc/p2sb.h A src/soc/intel/pantherlake/include/soc/pcie.h A src/soc/intel/pantherlake/include/soc/ramstage.h A src/soc/intel/pantherlake/include/soc/serialio.h M src/soc/intel/pantherlake/include/soc/systemagent.h A src/soc/intel/pantherlake/include/soc/tcss.h A src/soc/intel/pantherlake/include/soc/usb.h A src/soc/intel/pantherlake/lockdown.c A src/soc/intel/pantherlake/p2sb.c A src/soc/intel/pantherlake/pcie_rp.c A src/soc/intel/pantherlake/pmc.c A src/soc/intel/pantherlake/pmutil.c A src/soc/intel/pantherlake/retimer.c A src/soc/intel/pantherlake/smihandler.c A src/soc/intel/pantherlake/soundwire.c A src/soc/intel/pantherlake/spi.c A src/soc/intel/pantherlake/systemagent.c A src/soc/intel/pantherlake/tcss.c A src/soc/intel/pantherlake/uart.c A src/soc/intel/pantherlake/xhci.c 41 files changed, 3,739 insertions(+), 103 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/83798/54 -- To view, visit https://review.coreboot.org/c/coreboot/+/83798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Gerrit-Change-Number: 83798 Gerrit-PatchSet: 54 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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coreboot-gerrit August 2024