coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/intel/common/systemagent: Improve systemagent
by Shuo Liu (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Felix Singer, Jérémy Compostella, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83318?usp=email ) Change subject: soc/intel/common/systemagent: Improve systemagent ...................................................................... Patch Set 13: Code-Review+1 (2 comments) File src/soc/intel/common/block/include/intelblocks/systemagent.h: https://review.coreboot.org/c/coreboot/+/83318/comment/231d86f6_bc6db938?us… : PS12, Line 136: /* SoC call to fixup address. */ > Here you might need to raise an example for why a soc fix up is needed. Done File src/soc/intel/common/block/systemagent/systemagent.c: https://review.coreboot.org/c/coreboot/+/83318/comment/bfdad5ab_f6e5eadc?us… : PS7, Line 308: return; > or use is_dev_on_domain0 and pass the system agent dev directly to that function, since that one wil […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/83318?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If32c2a6524c9d55ce7f9c3dd203bcf85cab76c2c Gerrit-Change-Number: 83318 Gerrit-PatchSet: 13 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 06:43:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: yuchi.chen(a)intel.com Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[XS] Change in coreboot[main]: soc/intel/adl: Prevent unconditional legacy COM ports initialization
by Dinesh Gehlot (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Arthur Heymans, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Rishika Raj, Subrata Banik. Dinesh Gehlot has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84080?usp=email ) Change subject: soc/intel/adl: Prevent unconditional legacy COM ports initialization ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a6e38bd151f823d37c07ee89a800489122cc209 Gerrit-Change-Number: 84080 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 27 Aug 2024 06:33:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
by Saurabh Mishra (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Cliff Huang, Kapil Porwal, Pranava Y N, Saurabh Mishra. Hello Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83798?usp=email to look at the new patch set (#51). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage ...................................................................... soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage List of changes: 1. Add required SoC programming till ramstage. 2. Include only required headers into include/soc. 3. Skeleton code used to call FSP-S API. BUG=b:348678529 TEST=Verified on Intel® Simics® Pre Silicon Simulation platform for PTL using google/fatcat mainboard. Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/soc/intel/pantherlake/Kconfig M src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/acpi.c A src/soc/intel/pantherlake/chip.c M src/soc/intel/pantherlake/chip.h M src/soc/intel/pantherlake/chipset.cb A src/soc/intel/pantherlake/cpu.c A src/soc/intel/pantherlake/crashlog.c A src/soc/intel/pantherlake/cse_telemetry.c A src/soc/intel/pantherlake/elog.c A src/soc/intel/pantherlake/finalize.c A src/soc/intel/pantherlake/fsp_params.c A src/soc/intel/pantherlake/gspi.c A src/soc/intel/pantherlake/i2c.c A src/soc/intel/pantherlake/include/soc/cpu.h A src/soc/intel/pantherlake/include/soc/crashlog.h A src/soc/intel/pantherlake/include/soc/dptf.h M src/soc/intel/pantherlake/include/soc/iomap.h A src/soc/intel/pantherlake/include/soc/irq.h A src/soc/intel/pantherlake/include/soc/itss.h A src/soc/intel/pantherlake/include/soc/nvs.h M src/soc/intel/pantherlake/include/soc/p2sb.h A src/soc/intel/pantherlake/include/soc/pcie.h A src/soc/intel/pantherlake/include/soc/ramstage.h A src/soc/intel/pantherlake/include/soc/serialio.h M src/soc/intel/pantherlake/include/soc/systemagent.h A src/soc/intel/pantherlake/include/soc/tcss.h A src/soc/intel/pantherlake/include/soc/usb.h A src/soc/intel/pantherlake/lockdown.c A src/soc/intel/pantherlake/p2sb.c A src/soc/intel/pantherlake/pcie_rp.c A src/soc/intel/pantherlake/pmc.c A src/soc/intel/pantherlake/pmutil.c A src/soc/intel/pantherlake/retimer.c A src/soc/intel/pantherlake/smihandler.c A src/soc/intel/pantherlake/soundwire.c A src/soc/intel/pantherlake/spi.c A src/soc/intel/pantherlake/systemagent.c A src/soc/intel/pantherlake/tcss.c A src/soc/intel/pantherlake/uart.c A src/soc/intel/pantherlake/xhci.c 41 files changed, 3,685 insertions(+), 103 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/83798/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/83798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Gerrit-Change-Number: 83798 Gerrit-PatchSet: 51 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Configure DDR5 Physical channel width to 64
by Subrata Banik (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Arthur Heymans, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Paul Menzel, Tarun. Subrata Banik has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84085?usp=email ) Change subject: soc/intel/meteorlake: Configure DDR5 Physical channel width to 64 ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84085?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief6018e4dcce6b26804ff864cdfe116f0f90d545 Gerrit-Change-Number: 84085 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 27 Aug 2024 06:30:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/adl: Prevent unconditional legacy COM ports initialization
by Subrata Banik (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Arthur Heymans, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Rishika Raj. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84080?usp=email ) Change subject: soc/intel/adl: Prevent unconditional legacy COM ports initialization ...................................................................... Patch Set 2: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84080/comment/c38a4f8b_5039060c?us… : PS1, Line 14: These COM ports are being activated unconditionally, which is : undesirable for the Intel Alder Lake platform and causes traffic over : the IO bus. > > > I don't understand this. What code is generating those writes? > > > > sorry if things are not cleared. As we are not using Legacy UART for ChromeOS device but looking at the Alder Lake code, we found that Legacy COMs are default enabled and we have observed some activity across those ports. Hence, pushed this CL to ensure legacy COMs are not getting enabled when the desired kconfig are not being selected > > After booting to Kernel, we are seeing some traffic. For sure that is not any FW code. marking the comment resolved and feel free opening if not statisfied. https://review.coreboot.org/c/coreboot/+/84080/comment/0c528d29_1fbb9e48?us… : PS1, Line 18: As a result, this code is being removed and platforms that select : DRIVERS_UART_8250IO can activate legacy COM ports. > > Are there boards, that need to be adapted? > > Based on my understanding the boards that are expected to use Legacy COMs have already selected the correct Kconfig. For example: there are boards that select `DRIVERS_UART_8250IO` config. Ideally we don't need to keep legacy COMs default enabled. > > > ``` > src/mainboard/intel/adlrvp/Kconfig:25: select DRIVERS_UART_8250IO > src/mainboard/intel/adlrvp/Kconfig:41: select DRIVERS_UART_8250IO > src/mainboard/intel/adlrvp/Kconfig:70: select DRIVERS_UART_8250IO > ``` marking it resolved and please feel like reopening if not satisfied w/ my answer. File src/soc/intel/alderlake/bootblock/pch.c: https://review.coreboot.org/c/coreboot/+/84080/comment/332c9a31_dfb39c11?us… : PS1, Line 101: LPC_IOE_LPT_EN | LPC_IOE_FDD_EN | : LPC_IOE_LGE_200 | LPC_IOE_HGE_208 | > > Do you use a printer on the parallel port, a floppy disk drive, and a gaming port? > > I believe this code still requires some additional cleaning, but I am not going to touch it because I am unsure of who the consumer of this code is. We have encountered an issue in which legacy COMs are enabled by default, which should only occur when DRIVERS_UART_8250IO is selected (not POR for CrOS). As a result, I simply removed those lines of code with the assumption that when someone selects DRIVERS_UART_8250IO, legacy COMs will be enabled. marking the comment resolved and feel free opening if not statisfied. -- To view, visit https://review.coreboot.org/c/coreboot/+/84080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a6e38bd151f823d37c07ee89a800489122cc209 Gerrit-Change-Number: 84080 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 27 Aug 2024 06:28:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[XS] Change in coreboot[main]: mainboard/google/rex: Remove HAVE_ACPI_RESUME for Intel Meteor Lake
by Subrata Banik (Code Review) 27 Aug '24

27 Aug '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84081?usp=email ) Change subject: mainboard/google/rex: Remove HAVE_ACPI_RESUME for Intel Meteor Lake ...................................................................... mainboard/google/rex: Remove HAVE_ACPI_RESUME for Intel Meteor Lake This patch removes the HAVE_ACPI_RESUME config option from the Google Rex mainboard configuration. The Intel Meteor Lake SoC does not support S3 (ACPI sleep state) entry/exit, and attempting S3 validation could lead to abnormal platform behavior. This change ensures that `_S3` is not listed as a valid wake source in the DSDT (Differentiated System Description Table) after booting to the OS. BUG=b:351025543 TEST=Booted google/rex successfully and verified that the `_S3` name variable is not present in the DSDT. Change-Id: I730ade628eea84c60ba003a0c871e729b0ee0a9f Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84081 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/rex/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Arthur Heymans: Looks good to me, approved Eric Lai: Looks good to me, approved Dinesh Gehlot: Looks good to me, approved diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index 2ebcf32..c277725 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -19,7 +19,6 @@ select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI select GOOGLE_SMBIOS_MAINBOARD_VERSION - select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select I2C_TPM select INTEL_LPSS_UART_FOR_CONSOLE -- To view, visit https://review.coreboot.org/c/coreboot/+/84081?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I730ade628eea84c60ba003a0c871e729b0ee0a9f Gerrit-Change-Number: 84081 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XL] Change in coreboot[main]: mb/dell/snb_ivb_latitude/*/hda_verb.c: Use AZALIA_PIN_DESC macro
by Nicholas Chin (Code Review) 27 Aug '24

27 Aug '24

Nicholas Chin has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/84099?usp=email ) Change subject: mb/dell/snb_ivb_latitude/*/hda_verb.c: Use AZALIA_PIN_DESC macro ...................................................................... mb/dell/snb_ivb_latitude/*/hda_verb.c: Use AZALIA_PIN_DESC macro Use the AZALIA_PIN_DESC macro from include/device/azalia_device.h instead of magic numbers, as well as the enums for each of the register field values. The macros were generated by running util/hda-decoder against the original azalia logs used for the original board ports. TEST=Timeless builds for all variants did not change between main and this patch Change-Id: If5ecee39efbddbba101f820dead82efcb848b6bc Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c 11 files changed, 893 insertions(+), 108 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/84099/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84099?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5ecee39efbddbba101f820dead82efcb848b6bc Gerrit-Change-Number: 84099 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com>

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[XL] Change in coreboot[main]: mb/dell/snb_ivb_latitude: Use macros for azalia config
by Nicholas Chin (Code Review) 27 Aug '24

27 Aug '24

Nicholas Chin has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/84099?usp=email ) Change subject: mb/dell/snb_ivb_latitude: Use macros for azalia config ...................................................................... Patch Set 1: (1 comment) File src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c: https://review.coreboot.org/c/coreboot/+/84099/comment/fdba2fe0_a81b8535?us… : PS1, Line 28: 0x400000f0 These probably could be safely replaced with AZALIA_PIN_CFG_NC(0), though that expands to 0x411111f0 and would change the build. Might change it in a separate patch so that this one doesn't affect the build and can be more easily verified. -- To view, visit https://review.coreboot.org/c/coreboot/+/84099?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5ecee39efbddbba101f820dead82efcb848b6bc Gerrit-Change-Number: 84099 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Tue, 27 Aug 2024 04:15:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: mb/dell/snb_ivb_latitude: Use macros for azalia config
by Nicholas Chin (Code Review) 27 Aug '24

27 Aug '24

Nicholas Chin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84099?usp=email ) Change subject: mb/dell/snb_ivb_latitude: Use macros for azalia config ...................................................................... mb/dell/snb_ivb_latitude: Use macros for azalia config Use the AZALIA_PIN_DESC macro from include/device/azalia_device.h instead of magic numbers. The macros were generated by running util/hda-decoder against the original azalia logs used for the original board ports. TEST=Timeless builds for all variants did not change between main and this patch Change-Id: If5ecee39efbddbba101f820dead82efcb848b6bc Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c M src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c 11 files changed, 893 insertions(+), 108 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/84099/1 diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c index 0bc6c35..decb3fd 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c @@ -7,24 +7,96 @@ 0x1028049b, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x1028049b), - AZALIA_PIN_CFG(0, 0x0a, 0x04a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0421101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), AZALIA_PIN_CFG(0, 0x11, 0x400000f0), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), - AZALIA_PIN_CFG(0, 0x20, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x20, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), 0x80862805, /* Codec Vendor / Device ID: Intel */ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c index 1373975..31ac9a8 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c @@ -7,14 +7,62 @@ 0x1028049a, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x1028049a), - AZALIA_PIN_CFG(0, 0x0a, 0x04a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0421101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 10, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c index 3e89a6d..1743abd 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c @@ -7,24 +7,96 @@ 0x1028053d, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x1028053d), - AZALIA_PIN_CFG(0, 0x0a, 0x04a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0421101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), AZALIA_PIN_CFG(0, 0x11, 0x400000f0), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), - AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0), + AZALIA_PIN_CFG(0, 0x20, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 10, 0 + )), 0x80862806, /* Codec Vendor / Device ID: Intel */ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c index 0c69f0b..fddd454 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c @@ -7,14 +7,62 @@ 0x102804a9, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x102804a9), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c index f6876f9..4564b7f 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c @@ -7,14 +7,62 @@ 0x10280532, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280532), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c index 2e3f7fa..5d42ef6 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c @@ -7,24 +7,97 @@ 0x10280492, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280492), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), + 0x80862805, /* Codec Vendor / Device ID: Intel */ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c index 804733b..a514583 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c @@ -7,14 +7,62 @@ 0x10280533, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280533), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c index ede8445..2d61854 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c @@ -7,14 +7,62 @@ 0x10280493, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280493), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c index f069813..1218401 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c @@ -7,14 +7,62 @@ 0x10280534, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280534), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), + AZALIA_PIN_CFG(0, 0x0a, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0x0b, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0x0d, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0x0e, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0x0f, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x05, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x06, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x07, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c index ae37669..0675d78 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c @@ -7,12 +7,52 @@ 0x10280494, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280494), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), AZALIA_PIN_CFG(0, 0x11, 0x400000f2), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), @@ -22,9 +62,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c index 3ebccff..bac450c 100644 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c +++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c @@ -7,14 +7,62 @@ 0x10280535, /* Subsystem ID */ 11, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(0, 0x10280535), - AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), - AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), - AZALIA_PIN_CFG(0, 0x0d, 0x90170110), - AZALIA_PIN_CFG(0, 0x0e, 0x23011050), - AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), + AZALIA_PIN_CFG(0, 0xa, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(0, 0xb, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_LEFT, + AZALIA_HP_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 1, 15 + )), + AZALIA_PIN_CFG(0, 0xc, 0x400000f0), + AZALIA_PIN_CFG(0, 0xd, AZALIA_PIN_DESC( + AZALIA_INTEGRATED, + AZALIA_INTERNAL, + AZALIA_SPEAKER, + AZALIA_OTHER_ANALOG, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(0, 0xe, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_LINE_OUT, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 5, 0 + )), + AZALIA_PIN_CFG(0, 0xf, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_SEPARATE_CHASSIS | AZALIA_LEFT, + AZALIA_MIC_IN, + AZALIA_STEREO_MONO_1_8, + AZALIA_BLACK, + AZALIA_JACK_PRESENCE_DETECT, + 2, 14 + )), AZALIA_PIN_CFG(0, 0x10, 0x400000f3), - AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), + AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_DESC( + AZALIA_JACK_AND_INTEGRATED, + AZALIA_INTERNAL | AZALIA_TOP, + AZALIA_MIC_IN, + AZALIA_ATAPI_INTERNAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_NO_JACK_PRESENCE_DETECT, + 3, 0 + )), AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), AZALIA_PIN_CFG(0, 0x20, 0x400000f0), @@ -22,9 +70,33 @@ 0x80860101, /* Subsystem ID */ 4, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(3, 0x80860101), - AZALIA_PIN_CFG(3, 0x05, 0x18560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x18560030), + AZALIA_PIN_CFG(3, 0x5, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 1, 0 + )), + AZALIA_PIN_CFG(3, 0x6, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 2, 0 + )), + AZALIA_PIN_CFG(3, 0x7, AZALIA_PIN_DESC( + AZALIA_JACK, + AZALIA_DIGITAL_DISPLAY, + AZALIA_DIGITAL_OTHER_OUT, + AZALIA_OTHER_DIGITAL, + AZALIA_COLOR_UNKNOWN, + AZALIA_JACK_PRESENCE_DETECT, + 3, 0 + )), }; const u32 pc_beep_verbs[0] = {}; -- To view, visit https://review.coreboot.org/c/coreboot/+/84099?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5ecee39efbddbba101f820dead82efcb848b6bc Gerrit-Change-Number: 84099 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com>

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[M] Change in coreboot[main]: Documentation/mainboard/lenovo: Add ThinkCentre M710s
by Angel Pons (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Nicholas Chin, Nicholas Sudsgaard. Angel Pons has posted comments on this change by Nicholas Sudsgaard. ( https://review.coreboot.org/c/coreboot/+/80411?usp=email ) Change subject: Documentation/mainboard/lenovo: Add ThinkCentre M710s ...................................................................... Patch Set 22: (1 comment) File Documentation/mainboard/lenovo/thinkcentre_m710s_spi_location.jpg: PS22: > Could you shrink this image? As per https://doc.coreboot.org/getting_started/writing_documentation. […] I would go by file size rather than resolution -- To view, visit https://review.coreboot.org/c/coreboot/+/80411?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I90311257a28bd463712c4d43f8b83baa745509cc Gerrit-Change-Number: 80411 Gerrit-PatchSet: 22 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Tue, 27 Aug 2024 03:36:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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