coreboot-gerrit August 2024

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[M] Change in coreboot[main]: soc/amd/common/psp: add helper functions to retrieve capability bits
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84066?usp=email ) Change subject: soc/amd/common/psp: add helper functions to retrieve capability bits ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84066?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e17f994fb332690828c55742262da793e297d99 Gerrit-Change-Number: 84066 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 02:07:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/dell/snb_ivb_latitude: Move early_init.c out of variants
by Nicholas Chin (Code Review) 27 Aug '24

27 Aug '24

Nicholas Chin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84097?usp=email ) Change subject: mb/dell/snb_ivb_latitude: Move early_init.c out of variants ...................................................................... mb/dell/snb_ivb_latitude: Move early_init.c out of variants Now that the USB configs are in the devicetree, only the bootblock_mainboard_early_init function remains in early_init.c. It is identical between every variant except the E6230, which enabled fewer decode ranges in the LPC_EN register. Enabling the additional decode ranges probably shouldn't cause issues, so go with the majority. TEST=Timeless builds do not change with the exception of the E6230. Change-Id: Ic43915888f5893652991b7402ebab3bd3a2cf278 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/Makefile.mk R src/mainboard/dell/snb_ivb_latitude/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6430/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c D src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c 12 files changed, 2 insertions(+), 140 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/84097/1 diff --git a/src/mainboard/dell/snb_ivb_latitude/Makefile.mk b/src/mainboard/dell/snb_ivb_latitude/Makefile.mk index 299fbb9..bd50ae7 100644 --- a/src/mainboard/dell/snb_ivb_latitude/Makefile.mk +++ b/src/mainboard/dell/snb_ivb_latitude/Makefile.mk @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only -bootblock-y += variants/$(VARIANT_DIR)/early_init.c +bootblock-y += early_init.c bootblock-y += variants/$(VARIANT_DIR)/gpio.c -romstage-y += variants/$(VARIANT_DIR)/early_init.c +romstage-y += early_init.c romstage-y += variants/$(VARIANT_DIR)/gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/early_init.c similarity index 100% rename from src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c rename to src/mainboard/dell/snb_ivb_latitude/early_init.c diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c deleted file mode 100644 index 24c1b32..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6430/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6430/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6430/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c deleted file mode 100644 index ff83db0..0000000 --- a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <device/pci_ops.h> -#include <ec/dell/mec5035/mec5035.h> -#include <southbridge/intel/bd82x6x/pch.h> - -void bootblock_mainboard_early_init(void) -{ - pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN - | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN - | COMB_LPC_EN | COMA_LPC_EN); - mec5035_early_init(); -} -- To view, visit https://review.coreboot.org/c/coreboot/+/84097?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic43915888f5893652991b7402ebab3bd3a2cf278 Gerrit-Change-Number: 84097 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com>

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[XS] Change in coreboot[main]: soc/amd/stoneyridge/smihandler: add PSP SMI handler
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84077?usp=email ) Change subject: soc/amd/stoneyridge/smihandler: add PSP SMI handler ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84077?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I78944e2de86bc1e8e277d22a7a8da517622f49a1 Gerrit-Change-Number: 84077 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 02:01:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/amd/common/psp: move PSP SMI SPI access function prototypes
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84068?usp=email ) Change subject: soc/amd/common/psp: move PSP SMI SPI access function prototypes ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84068?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12cbbabf6a960836fe0c5dc1424c08550cb66a7a Gerrit-Change-Number: 84068 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:58:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd/common/psp: consistently use uint[8,16,32,64]_t data types
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84067?usp=email ) Change subject: soc/amd/common/psp: consistently use uint[8,16,32,64]_t data types ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84067?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I36151ecf94619afaf690dbb73834fcff3c51fdac Gerrit-Change-Number: 84067 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:58:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/amd/common/psp/psp_def: rework command buffer documentation
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84061?usp=email ) Change subject: soc/amd/common/psp/psp_def: rework command buffer documentation ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84061?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I510d953217240243392e8a415358524257bd28b1 Gerrit-Change-Number: 84061 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:54:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd/common/psp/psp_smi_flash: factor out generation-specific code
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84062?usp=email ) Change subject: soc/amd/common/psp/psp_smi_flash: factor out generation-specific code ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84062?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8e18f7ea53592d9fd413ad56e8d137cfc13ad5d4 Gerrit-Change-Number: 84062 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:54:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd/common/psp/psp_smi_flash: introduce common data structures
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84063?usp=email ) Change subject: soc/amd/common/psp/psp_smi_flash: introduce common data structures ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84063?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibe0bd2d8e6a5c39cc67a49e7bb3a51ce0900a39a Gerrit-Change-Number: 84063 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:54:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd/common/psp/psp_smi_flash: implement generation 1 support
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84064?usp=email ) Change subject: soc/amd/common/psp/psp_smi_flash: implement generation 1 support ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7e141f846e930bab6972a281745c0180ac52c291 Gerrit-Change-Number: 84064 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:54:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/amd/common/psp/psp_def: rename MBOX_BIOS_CMD_PSP_QUERY
by Marshall Dawson (Code Review) 27 Aug '24

27 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Marshall Dawson has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/84065?usp=email ) Change subject: soc/amd/common/psp/psp_def: rename MBOX_BIOS_CMD_PSP_QUERY ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84065?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id085b34363d39528bd125dfb77596d3ed13b6fa9 Gerrit-Change-Number: 84065 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 27 Aug 2024 01:54:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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