coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/intel/common/systemagent: Improve systemagent
by Shuo Liu (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Felix Held, Felix Singer, Jérémy Compostella, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83318?usp=email ) Change subject: soc/intel/common/systemagent: Improve systemagent ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/common/block/systemagent/systemagent_def.h: https://review.coreboot.org/c/coreboot/+/83318/comment/906516f6_d5e8182e?us… : PS13, Line 78: const char *description; Maybe add a bool need_soc_fixup field and set the field in sa_mem_map_descriptor init (e.g. https://review.coreboot.org/c/coreboot/+/83318/13/src/soc/intel/common/bloc…) using a Kconfig item. The Kconfig item could be default as false but could be redefined in SoC kconfig to true. At register accessing codes, when need_soc_fixup is true, to invoke the soc_fixup function there (no need to use weak declaration due to compiler optimization). -- To view, visit https://review.coreboot.org/c/coreboot/+/83318?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If32c2a6524c9d55ce7f9c3dd203bcf85cab76c2c Gerrit-Change-Number: 83318 Gerrit-PatchSet: 13 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 28 Aug 2024 04:15:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/adl: Prevent unconditional legacy COM ports initialization
by Subrata Banik (Code Review) 28 Aug '24

28 Aug '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84080?usp=email ) Change subject: soc/intel/adl: Prevent unconditional legacy COM ports initialization ...................................................................... soc/intel/adl: Prevent unconditional legacy COM ports initialization This patch eliminates the LPC_IOE_COMA_EN and LPC_IOE_COMB_EN IO enables from the io_enables variable in the pch_early_iorange_init() function because lpc_io_setup_comm_a_b() is intended to activate legacy COM ports like COM-A (0x3F8 - 0x3FF) and COM_B (0x2F8 - 0x2FF). These COM ports are being activated unconditionally, which is undesirable for the Intel Alder Lake platform and causes traffic over the IO bus. As a result, this code is being removed and platforms that select DRIVERS_UART_8250IO can activate legacy COM ports. BUG=b:354066052 TEST=Able to boot google/redrix to the operating system and confirm that there was no traffic over legacy COMs while being monitored using the eSPI analyzer. Change-Id: I7a6e38bd151f823d37c07ee89a800489122cc209 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84080 Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/alderlake/bootblock/pch.c 1 file changed, 1 insertion(+), 2 deletions(-) Approvals: Dinesh Gehlot: Looks good to me, approved Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/alderlake/bootblock/pch.c b/src/soc/intel/alderlake/bootblock/pch.c index 9041052..0115348 100644 --- a/src/soc/intel/alderlake/bootblock/pch.c +++ b/src/soc/intel/alderlake/bootblock/pch.c @@ -98,8 +98,7 @@ void pch_early_iorange_init(void) { - uint16_t io_enables = LPC_IOE_COMA_EN | LPC_IOE_COMB_EN | - LPC_IOE_LPT_EN | LPC_IOE_FDD_EN | + uint16_t io_enables = LPC_IOE_LPT_EN | LPC_IOE_FDD_EN | LPC_IOE_LGE_200 | LPC_IOE_HGE_208 | LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66 | LPC_IOE_SUPERIO_2E_2F | LPC_IOE_EC_4E_4F; -- To view, visit https://review.coreboot.org/c/coreboot/+/84080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a6e38bd151f823d37c07ee89a800489122cc209 Gerrit-Change-Number: 84080 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: soc/intel/alderlake: Remove SOC_INTEL_GFX_MBUS_JOIN config
by Subrata Banik (Code Review) 28 Aug '24

28 Aug '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84030?usp=email ) Change subject: soc/intel/alderlake: Remove SOC_INTEL_GFX_MBUS_JOIN config ...................................................................... soc/intel/alderlake: Remove SOC_INTEL_GFX_MBUS_JOIN config This patch removes the SOC_INTEL_GFX_MBUS_JOIN configuration option. Support for fast modeset joining has been added to the mainline i915 kernel driver (https://patchwork.freedesktop.org/series/130480/), making this coreboot-specific workaround unnecessary. BUG=b:291885733 TEST=Successful build and boot of google/marasov with single and dual displays, no redundant boot splash. Change-Id: I53c08a0e7a40b24db7cc910c5b9adc2376a9bb17 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84030 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paz Zcharya <pazz(a)google.com> Reviewed-by: YH Lin <yueherngl(a)google.com> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: Dinesh Gehlot: Looks good to me, approved build bot (Jenkins): Verified YH Lin: Looks good to me, but someone else must approve Paz Zcharya: Looks good to me, but someone else must approve diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 598c028..f7c585a 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -86,7 +86,6 @@ select SOC_INTEL_COMMON_RESET select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON && !BOARD_GOOGLE_BROX_COMMON select SOC_INTEL_CSE_SET_EOP - select SOC_INTEL_GFX_MBUS_JOIN if MAINBOARD_HAS_CHROMEOS && BMP_LOGO select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION select HAVE_INTEL_COMPLIANCE_TEST_MODE select SSE2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84030?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I53c08a0e7a40b24db7cc910c5b9adc2376a9bb17 Gerrit-Change-Number: 84030 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paz Zcharya <pazz(a)google.com> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: payloads/depthcharge: Add default 64-bit libpayload config
by Subrata Banik (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Martin L Roth, Wonkyu Kim. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84107?usp=email ) Change subject: payloads/depthcharge: Add default 64-bit libpayload config ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I assume this is for standalone build of coreboot? you don't need anything specifically to build 64-bit depthcharge beyond selecting LP payload Kconfig about 64-bit and depthcharge 64-bit Kconfig from respective board file. -- To view, visit https://review.coreboot.org/c/coreboot/+/84107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 Gerrit-Change-Number: 84107 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 04:00:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brya/var/nova: Configure scaler I2C GPIOs
by Dinesh Gehlot (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Jayvik Desai, Kapil Porwal, Kenneth Chan, Nick Vaccaro, Paul Menzel, Rishika Raj. Dinesh Gehlot has posted comments on this change by Kenneth Chan. ( https://review.coreboot.org/c/coreboot/+/84091?usp=email ) Change subject: mb/google/brya/var/nova: Configure scaler I2C GPIOs ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id831f594d6a57ed10867ae5ba05ae98c90ac7d9b Gerrit-Change-Number: 84091 Gerrit-PatchSet: 4 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 03:35:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/brox/jubilant: update dptf settings
by Ren Kuo (Code Review) 28 Aug '24

28 Aug '24

Ren Kuo has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84106?usp=email ) Change subject: mb/google/brox/jubilant: update dptf settings ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/84106?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0043c728f1302e86c84849653f443dc560a51654 Gerrit-Change-Number: 84106 Gerrit-PatchSet: 2 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 03:04:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: payloads/depthcharge: Add default 64-bit libpayload config
by Cliff Huang (Code Review) 28 Aug '24

28 Aug '24

Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84107?usp=email ) Change subject: payloads/depthcharge: Add default 64-bit libpayload config ...................................................................... payloads/depthcharge: Add default 64-bit libpayload config Add CONFIG_LP_DEFCONFIG64_OVERRIDE flag to select default 64-bit config file in payloads/libpayload/configs directory. BUG= TEST=Build with this new flag and check that the libpayload and depthcharge.elf are built in 64-bit format. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 --- M payloads/external/Makefile.mk M payloads/external/depthcharge/Kconfig M payloads/external/depthcharge/Makefile A payloads/libpayload/configs/defconfig64 4 files changed, 26 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/84107/1 diff --git a/payloads/external/Makefile.mk b/payloads/external/Makefile.mk index 53693f5..412ac68 100644 --- a/payloads/external/Makefile.mk +++ b/payloads/external/Makefile.mk @@ -152,7 +152,8 @@ DEPTHCHARGE_STABLE=$(CONFIG_DEPTHCHARGE_STABLE) \ DEPTHCHARGE_REVISION=$(CONFIG_DEPTHCHARGE_REVISION) \ DEPTHCHARGE_REVISION_ID=$(CONFIG_DEPTHCHARGE_REVISION_ID) \ - OVERRIDE_DEFCONFIG=$(CONFIG_LP_DEFCONFIG_OVERRIDE) + OVERRIDE_DEFCONFIG=$(CONFIG_LP_DEFCONFIG_OVERRIDE) \ + OVERRIDE_DEFCONFIG64=$(CONFIG_LP_DEFCONFIG64_OVERRIDE) # edk2 diff --git a/payloads/external/depthcharge/Kconfig b/payloads/external/depthcharge/Kconfig index 86b20ab..2963da3 100644 --- a/payloads/external/depthcharge/Kconfig +++ b/payloads/external/depthcharge/Kconfig @@ -62,4 +62,13 @@ instead. This is can be a convenience for development purposes, or if the defaults in defconfig are sufficient for your system. +config LP_DEFCONFIG64_OVERRIDE + bool "Use default 64-bit libpayload config" + default n if LP_DEFCONFIG_OVERRIDE + help + The Depthcharge makefile looks for a file config.<boardname> in the + libpayload/configs directory. Say Y here to use the file defconfig + instead. This is can be a convenience for development purposes, or + if the defaults in defconfig are sufficient for your system. + endif diff --git a/payloads/external/depthcharge/Makefile b/payloads/external/depthcharge/Makefile index af303da..9866109 100644 --- a/payloads/external/depthcharge/Makefile +++ b/payloads/external/depthcharge/Makefile @@ -30,6 +30,9 @@ ifeq ($(OVERRIDE_DEFCONFIG),y) libpayload_config=$(libpayload_dir)/configs/defconfig DEPTHCHARGE_LIBPAYLOAD_MSG="Depthcharge: Using default defconfig for libpayload" +else ifeq ($(OVERRIDE_DEFCONFIG64),y) +libpayload_config=$(libpayload_dir)/configs/defconfig64 +DEPTHCHARGE_LIBPAYLOAD_MSG="Depthcharge: Using default defconfig for 64-bit libpayload" else libpayload_config=$(libpayload_dir)/configs/config.$(BOARD) DEPTHCHARGE_LIBPAYLOAD_MSG="Depthcharge: Using $(libpayload_dir)/configs/config.$(BOARD)" diff --git a/payloads/libpayload/configs/defconfig64 b/payloads/libpayload/configs/defconfig64 new file mode 100644 index 0000000..e3904dc --- /dev/null +++ b/payloads/libpayload/configs/defconfig64 @@ -0,0 +1,12 @@ +CONFIG_LP_CHROMEOS=y +# CONFIG_LP_8250_SERIAL_CONSOLE=y +CONFIG_LP_ARCH_X86_32=n +CONFIG_LP_ARCH_X86_64=y +# CONFIG_LP_MULTIBOOT is not set +CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y +CONFIG_LP_USB=y +CONFIG_LP_USB_UHCI=y +CONFIG_LP_USB_OHCI=y +CONFIG_LP_USB_EHCI=y +CONFIG_LP_USB_XHCI=y +CONFIG_LP_HEAP_SIZE=1048576 -- To view, visit https://review.coreboot.org/c/coreboot/+/84107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 Gerrit-Change-Number: 84107 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com>

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[M] Change in coreboot[main]: mb/google/brox/jubilant: update dptf settings
by Ren Kuo (Code Review) 28 Aug '24

28 Aug '24

Ren Kuo has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84106?usp=email ) Change subject: mb/google/brox/jubilant: update dptf settings ...................................................................... mb/google/brox/jubilant: update dptf settings Update dptf settings from thermal team. BUG=None TEST= Build jubilant firmware Change-Id: I0043c728f1302e86c84849653f443dc560a51654 Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brox/variants/jubilant/overridetree.cb 1 file changed, 17 insertions(+), 73 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/84106/1 diff --git a/src/mainboard/google/brox/variants/jubilant/overridetree.cb b/src/mainboard/google/brox/variants/jubilant/overridetree.cb index 6f5a05d..9599769 100644 --- a/src/mainboard/google/brox/variants/jubilant/overridetree.cb +++ b/src/mainboard/google/brox/variants/jubilant/overridetree.cb @@ -44,51 +44,12 @@ register "options.tsr[1].desc" = ""Soc"" register "options.tsr[2].desc" = ""Charger"" - ## Active Policy - register "policies.active" = "{ - [0] = { - .target = DPTF_CPU, - .thresholds = { - TEMP_PCT(95, 90), - TEMP_PCT(92, 80), - TEMP_PCT(89, 60), - TEMP_PCT(85, 40), - TEMP_PCT(80, 30), - } - }, - [1] = { - .target = DPTF_TEMP_SENSOR_0, - .thresholds = { - TEMP_PCT(54, 95), - TEMP_PCT(52, 90), - TEMP_PCT(50, 80), - TEMP_PCT(48, 50), - TEMP_PCT(46, 30), - TEMP_PCT(44, 25), - TEMP_PCT(42, 20), - TEMP_PCT(40, 15), - } - }, - [2] = { - .target = DPTF_TEMP_SENSOR_1, - .thresholds = { - TEMP_PCT(54, 95), - TEMP_PCT(52, 90), - TEMP_PCT(50, 80), - TEMP_PCT(48, 50), - TEMP_PCT(46, 30), - TEMP_PCT(44, 25), - TEMP_PCT(42, 20), - TEMP_PCT(40, 15), - } - } - }" - ## Passive Policy register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, CPU, 97, 5000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000), - [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 85, 5000), + [0] = DPTF_PASSIVE(CPU, CPU, 97, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000), + [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 85, 5000), }" ## Critical Policy @@ -96,23 +57,24 @@ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { - .min_power = 15000, - .max_power = 18000, - .time_window_min = 28 * MSECS_PER_SEC, - .time_window_max = 32 * MSECS_PER_SEC, - .granularity = 200, - }, + .min_power = 15000, + .max_power = 18000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 200, + }, .pl2 = { - .min_power = 55000, - .max_power = 55000, - .time_window_min = 28 * MSECS_PER_SEC, - .time_window_max = 32 * MSECS_PER_SEC, - .granularity = 1000, - } + .min_power = 41000, + .max_power = 41000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 1000, + } }" ## Charger Performance Control (Control, mA) @@ -123,24 +85,6 @@ [3] = { 8, 500 } }" - ## Fan Performance Control (Percent, Speed, Noise, Power) - register "controls.fan_perf" = "{ - [0] = { 90, 6700, 220, 2200, }, - [1] = { 80, 5800, 180, 1800, }, - [2] = { 70, 5000, 145, 1450, }, - [3] = { 60, 4900, 115, 1150, }, - [4] = { 50, 3838, 90, 900, }, - [5] = { 40, 2904, 55, 550, }, - [6] = { 30, 2337, 30, 300, }, - [7] = { 20, 1608, 15, 150, }, - [8] = { 10, 800, 10, 100, }, - [9] = { 0, 0, 0, 50, } - }" - - ## Fan options - register "options.fan.fine_grained_control" = "1" - register "options.fan.step_size" = "2" - device generic 0 alias dptf_policy on end end end # DTT -- To view, visit https://review.coreboot.org/c/coreboot/+/84106?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0043c728f1302e86c84849653f443dc560a51654 Gerrit-Change-Number: 84106 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com>

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[S] Change in coreboot[main]: mb/google/brox/var/jubilant: Remove STORAGE_UNKNOWN fw_config option
by Ren Kuo (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Bob Moragues, Bob Moragues, Eran Mitrani, Karthik Ramasubramanian, Ren Kuo, Ren Kuo. Ren Kuo has uploaded a new patch set (#3) to the change originally created by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/84095?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Bob Moragues, Code-Review+2 by Ren Kuo, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: mb/google/brox/var/jubilant: Remove STORAGE_UNKNOWN fw_config option ...................................................................... mb/google/brox/var/jubilant: Remove STORAGE_UNKNOWN fw_config option With `probe unprovisioned` fw_config rule, there is no need to define an explicit STORAGE_UNKNOWN option. Hence remove it. BUG=None TEST=Build Jubilant FW image. Change-Id: I4f6ace4b39a1ee0b63486d3872b20c8da719ae4a Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/variants/jubilant/fw_config.c M src/mainboard/google/brox/variants/jubilant/overridetree.cb M src/mainboard/google/brox/variants/jubilant/variant.c 3 files changed, 8 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/84095/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4f6ace4b39a1ee0b63486d3872b20c8da719ae4a Gerrit-Change-Number: 84095 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quantatw.com> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Bob Moragues <moragues(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: soc/intel/alderlake: Add Vccin Aux Imon Iccmax setting
by Eric Lai (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Daniel Peng, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Rishika Raj, Simon Yang, Subrata Banik, Sumeet R Pawnikar. Eric Lai has posted comments on this change by Simon Yang. ( https://review.coreboot.org/c/coreboot/+/82682?usp=email ) Change subject: soc/intel/alderlake: Add Vccin Aux Imon Iccmax setting ...................................................................... Patch Set 16: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82682?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0651f0eb8a5c32b27c524e43bbf6f2a184b95657 Gerrit-Change-Number: 82682 Gerrit-PatchSet: 16 Gerrit-Owner: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sumeet R Pawnikar Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 02:11:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit August 2024