coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

1 participants
3913 discussions

[S] Change in coreboot[main]: mb/google/brya: Add romstage early graphics for trulo baseboard
by Eric Lai (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Amanda Hwang, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84128?usp=email ) Change subject: mb/google/brya: Add romstage early graphics for trulo baseboard ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84128?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic34a8601b3084aa5f780d358fb0b15b7e820d375 Gerrit-Change-Number: 84128 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 09:07:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek: Add EARLY_INIT_PCIE_RESET to early_init_type
by Yu-Ping Wu (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84116?usp=email ) Change subject: soc/mediatek: Add EARLY_INIT_PCIE_RESET to early_init_type ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84116?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ab85694e85a4c3f77fefc22efe16734c347a716 Gerrit-Change-Number: 84116 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 09:02:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Hook up microcode from repository
by Subrata Banik (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Eran Mitrani, Felix Singer, Jakub Czapiga, Kapil Porwal, Nico Huber, Tarun. Subrata Banik has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/84125?usp=email ) Change subject: soc/intel/meteorlake: Hook up microcode from repository ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/meteorlake/Kconfig: https://review.coreboot.org/c/coreboot/+/84125/comment/b5e7dfb6_0feade3a?us… : PS4, Line 40: MICROCODE_BLOB_UNDISCLOSED > Are you sure it makes a difference? It only changes the default. i meant for below code change. https://review.coreboot.org/c/coreboot/+/84125/4/src/soc/intel/meteorlake/M… this 3rdparty path is not applicable for us while we are building the code inside chromium repo. -- To view, visit https://review.coreboot.org/c/coreboot/+/84125?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46021accacbb911d7a7ecfdbb52973a7da78f36e Gerrit-Change-Number: 84125 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 09:01:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO high range
by Lean Sheng Tan (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Paul Menzel, Shuo Liu, Tim Chu. Lean Sheng Tan has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email ) Change subject: soc/intel/xeon_sp: Reserve MMIO high range ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83538/comment/941036bf_9f2a6919?us… : PS4, Line 31: tsc: Detected 2000.000 MHz processor : last_pfn = 0x2080000 max_arch_pfn = 0x10000000000 : x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT : WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 129024MB of RAM. : ------------[ cut here ]------------ : WARNING: CPU: 0 PID: 0 at arch/x86/kernel/cpu/mtrr/cleanup.c:978 mtrr_trim_uncached_memory+0x2b9/0x2f9 : ... : Call Trace: : ? 0xffffffff8f600000 : ? setup_arch+0x4bb/0xaed : ? printk+0x53/0x6a : ? start_kernel+0x55/0x507 : ? load_ucode_intel_bsp+0x1c/0x4d : ? secondary_startup_64_no_verify+0xc2/0xcb : random: get_random_bytes called from init_oops_id+0x1d/0x2c with crng_init=0 : ---[ end trace 0e56686fd458f0c5 ]--- : update e820 for mtrr : modified physical RAM map: : modified: [mem 0x0000000000000000-0x0000000000000fff] reserved : ... : modified: [mem 0x00000000ff000000-0x000000207fffffff] reserved : last_pfn = 0x6354e max_arch_pfn = 0x10000000000 : Memory KASLR using RDRAND RDTSC... : x2apic: enabled by BIOS, switching to x2apic ops : Using GB pages for direct mapping : ... : Initmem setup node 0 [mem 0x0000000000001000-0x000000006354dfff] : DMA zone: 28769 pages in unavailable ranges : DMA32 zone: 19122 pages in unavailable ranges : BUG: unable to handle page fault for address: ff24b56eba60cff8 : BAD : Oops: 0000 [#1] SMP NOPTI : CPU: 0 PID: 0 Comm: swapper Tainted: G W 5.10.50 #2 : ... : Call Trace: : ? set_pte_vaddr_p4d+0x24/0x35 : ? __native_set_fixmap+0x21/0x28 : ? map_vsyscall+0x35/0x56 : ? setup_arch+0xa00/0xaed : ? printk+0x53/0x6a : ? start_kernel+0x55/0x507 : ? load_ucode_intel_bsp+0x1c/0x4d : ? secondary_startup_64_no_verify+0xc2/0xcb : CR2: ff24b56eba60cff8 : ---[ end trace 0e56686fd458f0c6 ]--- : RIP: 0010:fill_pud+0xa/0x62 : ... : Kernel panic - not syncing: Attempted to kill the idle task! : ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]--- > Yes, in 6.10.0, hangs at below sites without further logs. […] @paulepanter@mailbox.org any concerns? -- To view, visit https://review.coreboot.org/c/coreboot/+/83538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib2a0e1f1f13e797c1fab6aca589d060c4d3fa15b Gerrit-Change-Number: 83538 Gerrit-PatchSet: 5 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 09:01:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[S] Change in coreboot[main]: soc/mediatek/common: Move mtk_pcie_reset to common/pcie.c
by Yu-Ping Wu (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84115?usp=email ) Change subject: soc/mediatek/common: Move mtk_pcie_reset to common/pcie.c ...................................................................... Patch Set 2: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/84115/comment/ecf8838f_2f7d59cb?us… : PS2, Line 250: base `reg` or `base_reg` or `reg_base`. -- To view, visit https://review.coreboot.org/c/coreboot/+/84115?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib540cf9cc568206a1e78306624f4df7c5631c128 Gerrit-Change-Number: 84115 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 09:00:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek/common/pcie: Use clr/setbits32p
by Yu-Ping Wu (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84114?usp=email ) Change subject: soc/mediatek/common/pcie: Use clr/setbits32p ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Patchset: PS2: Thanks. I should have noticed this when reviewing the code. -- To view, visit https://review.coreboot.org/c/coreboot/+/84114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id99d5aafdf4d687dbe3a0bef29b148537cf58dd8 Gerrit-Change-Number: 84114 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 08:56:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add EINT support
by Yidi Lin (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has uploaded a new patch set (#13) to the change originally created by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84026?usp=email ) Change subject: soc/mediatek/mt8196: Add EINT support ...................................................................... soc/mediatek/mt8196: Add EINT support BUG=b:334723688 TEST=EINT works in Rauru Change-Id: Ibeb2dafcd9909b4afbfa81728700718f01d3818f Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/gpio_eint.c 2 files changed, 303 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/84026/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/84026?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibeb2dafcd9909b4afbfa81728700718f01d3818f Gerrit-Change-Number: 84026 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/mediatek/common/pcie: Add DEVTREE_CONST qualifier
by Yu-Ping Wu (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84113?usp=email ) Change subject: soc/mediatek/common/pcie: Add DEVTREE_CONST qualifier ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84113?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7c95424019ec0dca50bbc6be7f81b6180d06d6e Gerrit-Change-Number: 84113 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 08:53:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/common/pcie: Add DEVTREE_CONST qualifier
by Yu-Ping Wu (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84113?usp=email ) Change subject: soc/mediatek/common/pcie: Add DEVTREE_CONST qualifier ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84113/comment/ac3a5fe7_0fe68222?us… : PS2, Line 12: src/soc/mediatek/common/pcie.c:104:26: error: assignment discards When will this error show up? I mean, why didn't Jenkins build fail without this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/84113?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7c95424019ec0dca50bbc6be7f81b6180d06d6e Gerrit-Change-Number: 84113 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 08:53:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add EINT support
by Yidi Lin (Code Review) 29 Aug '24

29 Aug '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84026?usp=email ) Change subject: soc/mediatek/mt8196: Add EINT support ...................................................................... Patch Set 12: (4 comments) File src/soc/mediatek/mt8196/eint.c: PS7: > rename to gpio_eint.c for consistency. Done File src/soc/mediatek/mt8196/eint.c: https://review.coreboot.org/c/coreboot/+/84026/comment/e8d9d038_7ce1dbd9?us… : PS8, Line 11: [4] > If we're using `uint8_t` for `instance`, please define enum for its values (e.g. […] Use `define` instead of `enum` since `enum` data size is 4 bytes. https://review.coreboot.org/c/coreboot/+/84026/comment/fe20a0d4_272afe9a?us… : PS8, Line 11: uint32_t > We only use EINT to setup the IRQ pin from GSC. […] Done https://review.coreboot.org/c/coreboot/+/84026/comment/3834e651_4c5aaad8?us… : PS8, Line 13: {0, 2, 0, 1}, > Can we put one entry `{a, b, c, d}` per line? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84026?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibeb2dafcd9909b4afbfa81728700718f01d3818f Gerrit-Change-Number: 84026 Gerrit-PatchSet: 12 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Thu, 29 Aug 2024 08:53:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit August 2024