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Change subject: soc/amd/picasso/Makefile: move PSP_NVRAM_[BASE,SIZE]
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Change subject: soc/amd/picasso/Makefile: move PSP_NVRAM_[BASE,SIZE]
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Change subject: soc/amd/picasso/Makefile: move PSP_NVRAM_[BASE,SIZE]
......................................................................
soc/amd/picasso/Makefile: move PSP_NVRAM_[BASE,SIZE]
Move PSP_NVRAM_BASE and PSP_NVRAM_SIZE from the BIOS directory table
items to the PSP Directory Table items, since the corresponding region
will be referenced by the PSP directory table and not the BIOS directory
table.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: Iff7568ea05c701ecd346cc7590cf93b091ff31a2
---
M src/soc/amd/picasso/Makefile.mk
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/83813/1
diff --git a/src/soc/amd/picasso/Makefile.mk b/src/soc/amd/picasso/Makefile.mk
index b65d1c8..7545bb2 100644
--- a/src/soc/amd/picasso/Makefile.mk
+++ b/src/soc/amd/picasso/Makefile.mk
@@ -83,6 +83,11 @@
OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
endif
+# type = 0x04
+# The flashmap section used for this is expected to be named PSP_NVRAM
+PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
+PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
+
# type = 0x3a
ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
@@ -91,11 +96,6 @@
# BIOS Directory Table items - proper ordering is managed by amdfwtool
#
-# type = 0x4
-# The flashmap section used for this is expected to be named PSP_NVRAM
-PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
-PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
-
# type = 0x7
# RSA 2048 signature
#ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y)
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