Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83780?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: MAINTAINERS: Add Subrata, Kapil and Pranava for intel/pantherlake
......................................................................
MAINTAINERS: Add Subrata, Kapil and Pranava for intel/pantherlake
Add INTEL PANTHERLAKE SOC section for soc/intel/pantherlake and
add Subrata, Kapil and Pranava as maintainers.
Change-Id: Ife75a0d8111e694ae62db157eb36b09d976762c3
Signed-off-by: Pranava Y N <pranavayn(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83780
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M MAINTAINERS
1 file changed, 7 insertions(+), 0 deletions(-)
Approvals:
Paul Menzel: Looks good to me, but someone else must approve
Subrata Banik: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/MAINTAINERS b/MAINTAINERS
index bfcfdc4..4371d11 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -908,6 +908,13 @@
S: Maintained
F: src/soc/intel/meteorlake/
+INTEL PANTHERLAKE SOC
+M: Subrata Banik <subratabanik(a)google.com>
+M: Kapil Porwal <kapilporwal(a)google.com>
+M: Pranava Y N <pranavayn(a)google.com>
+S: Maintained
+F: src/soc/intel/pantherlake/
+
INTEL TIGERLAKE SOC
M: Subrata Banik <subratabanik(a)google.com>
M: Nick Vaccaro <nvaccaro(a)chromium.org>
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Gerrit-Change-Number: 83780
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83767?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: MAINTAINERS: Add Subrata and Pranava for new google/fatcat entry
......................................................................
MAINTAINERS: Add Subrata and Pranava for new google/fatcat entry
Add GOOGLE FATCAT MAINBOARDS section for src/mb/google/fatcat and
update the maintainers list to add Subrata Banik and Pranava Y N
as maintainers
Change-Id: I5ae0f0d24d43e91c2097c68446bb64b9ae507e2e
Signed-off-by: Pranava Y N <pranavayn(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83767
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
---
M MAINTAINERS
1 file changed, 5 insertions(+), 0 deletions(-)
Approvals:
Subrata Banik: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/MAINTAINERS b/MAINTAINERS
index 5dd71e6..bfcfdc4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -342,6 +342,11 @@
S: Maintained
F: src/mainboard/google/brya/
+GOOGLE FATCAT MAINBOARDS
+M: Subrata Banik <subratabanik(a)google.com>
+M: Pranava Y N <pranavayn(a)google.com>
+F: src/mainboard/google/fatcat/
+
GOOGLE HATCH MAINBOARDS
M: Subrata Banik <subratabanik(a)google.com>
M: Nick Vaccaro <nvaccaro(a)chromium.org>
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Change subject: device/pci_ids: Add new Intel PTL device IDs for Tracehub
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/google/nissa/var/sundance: Adjust WWAN GPIO sequence
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Looks like this is more over a completing WWAN power seq.
1. bootblock: GPP_F12 <--- 0
2. ramstage : GPP_F12 <--- 1 (200ms after #1)
w/o the bootblock CL, wondering what will happen during warm resets ? don't we need power seq for WWAN module ?
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Change subject: soc/intel/common: Add SoC QDF read function
......................................................................
Patch Set 4:
(3 comments)
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/83785/comment/308abd62_2d0ba28c?us… :
PS4, Line 272: This function reads SoC QDF information.
```suggestion
* This function reads SoC QDF information using PMC interface.
```
https://review.coreboot.org/c/coreboot/+/83785/comment/2a87322b_f2ccab66?us… :
PS4, Line 273: Panther Lake SoC.
how can we ensure that no other platform is calling into this API ?
what is downside of calling into function over older platform ?
File src/soc/intel/common/block/pmc/pmclib.c:
https://review.coreboot.org/c/coreboot/+/83785/comment/8d13b584_d282774e?us… :
PS4, Line 903: pmc_send_ipc_cmd
is there any downside of sending this cmd for an older platform where I assume this cmd will fail for sure. Based on my previous understanding if one PMC IPC starts failing once then all consecutive cmd will fail for sure. I would like to ensure that we are only sending this cmd for the support platform alone. if that means, you need to introduce a newer Kconfig and select that from PTL onwards, I'm okay with it
```
config SOC_QDF_DYNAMIC_READ_PMC
bool n
depends on SOC_INTEL_COMMON_BLOCK_PMC
help
Enable this option if the platform supports reading SOC QDF
data dynamically at runtime using the PMC IPC interface.
```
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