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Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
Patch Set 20:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83705/comment/b3a3f3d4_28dbd896?us… :
PS20, Line 12: BUG=NA
i guess there is a bug (b/352651132) which should be enough to give answer to the https://review.coreboot.org/c/coreboot/+/83705/comment/1642968c_11092f35/ open
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Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
Patch Set 20: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83705/comment/824eb1fc_19bdfae4?us… :
PS20, Line 15: Cq-Depend: CB:83769, CB:83770
please remove this. We don't use this here (all dependent CLs should be part of the patch train for CI to pick it in order). We typically add this when we are working across the gerrit project and has inter-dependency like coreboot CL has a dependency over FSP CL>
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Hello Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83635?usp=email
to look at the new patch set (#59).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
......................................................................
soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
List of changes:
1. Add required SoC programming till romstage
2. Include only required headers into include/soc
3. Fill required FSP-M UPD to call FSP-M API
4. Ref: Processor EDS documents
Panther Lake U/H 12Xe/H 4Xe External Design
Specification (EDS) Rev. 0.7, vol 1 of 2 #815002 and
Volume 2 of 2 #813030
BUG=b:348678529
TEST=Verified on Intel® Simics® Pre Silicon Simulation platform
for PTL using google/fatcat mainboard.
Change-Id: I27e1a6c56bca01e7f5f53fbf3cb6855bac7b2848
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com>
---
M src/soc/intel/pantherlake/Kconfig
M src/soc/intel/pantherlake/Makefile.mk
A src/soc/intel/pantherlake/chip.h
A src/soc/intel/pantherlake/chipset.cb
A src/soc/intel/pantherlake/include/soc/gpe.h
A src/soc/intel/pantherlake/include/soc/meminit.h
A src/soc/intel/pantherlake/include/soc/msr.h
A src/soc/intel/pantherlake/include/soc/pmc.h
A src/soc/intel/pantherlake/include/soc/romstage.h
A src/soc/intel/pantherlake/include/soc/soc_chip.h
A src/soc/intel/pantherlake/include/soc/systemagent.h
A src/soc/intel/pantherlake/meminit.c
A src/soc/intel/pantherlake/p2sb.c
A src/soc/intel/pantherlake/reset.c
A src/soc/intel/pantherlake/romstage/Makefile.mk
A src/soc/intel/pantherlake/romstage/fsp_params.c
A src/soc/intel/pantherlake/romstage/romstage.c
A src/soc/intel/pantherlake/romstage/systemagent.c
18 files changed, 1,366 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/83635/59
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Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
Patch Set 20:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83705/comment/b6101f7c_d8e4d622?us… :
PS20, Line 15: Cq-Depend: CB:83769, CB:83770
This is a thing specific to the ChromeOS CI, it does not work here. In general, since coreboot is built from a single repo, there is no need for these sort of cross-repo dependency annotations. If you upload multiple patches in a patch series, the CI automatically understands that the later patches are dependent on the earlier ones. (In cases where you're depending on submodule code, you'll have to put the submodule uprev before or into the patch that depends on it.)
File src/vendorcode/google/chromeos/Kconfig:
https://review.coreboot.org/c/coreboot/+/83705/comment/1642968c_11092f35?us… :
PS20, Line 105: config CHROMEOS_ENABLE_ESOL
Does this Kconfig actually do anything? I don't see it referenced anywhere?
Normally you should add Kconfigs together with the first piece of code that uses them.
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Change subject: util/amdfwtool: add support to specify RPMC NVRAM region
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Patch Set 1: Code-Review+2
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Change subject: region: Introduce region_create() functions
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Patch Set 8: Code-Review+2
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