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Felix Held has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76128?usp=email )
Change subject: acpi: Move HPET generation to a common location
......................................................................
Patch Set 12:
(4 comments)
File src/acpi/Kconfig:
https://review.coreboot.org/c/coreboot/+/76128/comment/d58732d5_d5a6516e?us… :
PS11, Line 101:
> not sure why this second newline is added
Done
File src/soc/amd/common/block/acpi/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/76128/comment/705384bf_b53d4880?us… :
PS11, Line 8: ramstage-y += tables.c
> that has still parts that are used
Done
File src/soc/amd/common/block/include/amdblocks/acpi.h:
https://review.coreboot.org/c/coreboot/+/76128/comment/d886c15b_3788fdbf?us… :
PS11, Line 60: unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current,
> still needed
Done
File src/soc/amd/common/block/lpc/lpc.c:
https://review.coreboot.org/c/coreboot/+/76128/comment/e82e6587_fcef9383?us… :
PS11, Line 317: .write_acpi_tables = southbridge_write_acpi_tables,
> still needed for acpi_16550_mmio32_write_dbg2_uart
Done
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Felix Held has uploaded a new patch set (#12) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76128?usp=email )
The following approvals got outdated and were removed:
Code-Review+1 by Nico Huber, Code-Review+2 by Lean Sheng Tan, Verified+1 by build bot (Jenkins)
Change subject: acpi: Move HPET generation to a common location
......................................................................
acpi: Move HPET generation to a common location
HPET is usually a feature of the hardware that needs no runtime to check
whether it is present or it is typically unconditionally enabled. This
means a simple Kconfig option to generate the ACPI tables is sufficient,
which allows reduction of boilerplate.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Signed-off-by: Felix Held <felix.held(a)amd.com>
Change-Id: I38b9962a8d568267356256a3edc51348b9417e20
---
M src/acpi/Kconfig
M src/acpi/Makefile.mk
M src/acpi/acpi.c
M src/acpi/acpi_hpet.c
M src/include/acpi/acpi.h
M src/soc/amd/common/block/acpi/Kconfig
M src/soc/amd/common/block/acpi/tables.c
M src/soc/intel/baytrail/Kconfig
M src/soc/intel/baytrail/southcluster.c
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/acpi.c
M src/soc/intel/broadwell/pch/Kconfig
M src/soc/intel/broadwell/pch/lpc.c
M src/soc/intel/common/block/acpi/Kconfig
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/include/intelblocks/lpc_lib.h
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/xeon_sp/gnr/chip.c
M src/soc/intel/xeon_sp/gnr/chipset.cb
M src/southbridge/amd/pi/hudson/Kconfig
M src/southbridge/amd/pi/hudson/lpc.c
M src/southbridge/intel/bd82x6x/Kconfig
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/i82371eb/Kconfig
M src/southbridge/intel/i82371eb/isa.c
M src/southbridge/intel/i82801gx/Kconfig
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801ix/Kconfig
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/Kconfig
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/ibexpeak/Kconfig
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/lynxpoint/Kconfig
M src/southbridge/intel/lynxpoint/lpc.c
35 files changed, 41 insertions(+), 81 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/76128/12
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Change subject: region: Introduce region_create() functions
......................................................................
Patch Set 9: Code-Review+2
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Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
Patch Set 28:
(1 comment)
File src/vendorcode/google/chromeos/Kconfig:
https://review.coreboot.org/c/coreboot/+/83705/comment/fd693922_c547ce08?us… :
PS26, Line 108: Enabled if the platform has an early sign of life feature.
> Updated the help message to accommodate the recent changes. […]
Acknowledged
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Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
Patch Set 28:
(1 comment)
File src/vendorcode/google/chromeos/Kconfig:
https://review.coreboot.org/c/coreboot/+/83705/comment/35988831_1e14081c?us… :
PS26, Line 108: Enabled if the platform has an early sign of life feature.
> should we also say, for what we are using early SOL feature and what is the expectation here ? […]
Updated the help message to accommodate the recent changes. thanks
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Hello Angel Pons, Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Paul Menzel, Rishika Raj, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83705?usp=email
to look at the new patch set (#28).
Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
vc/google/chromeos: Enable eSOL config with libgfx and uGOP
This patch introduces a new early sign-of-life config option when
libgfx or uGOP is enabled for early graphics initialization.
BUG=b:352651132
TEST=Able to build google/rex and google/tivviks
Change-Id: Ic8fe4ca5234de7f8e579f950f6ccbf750f4c7950
Signed-off-by: Jayvik Desai <jayvik(a)google.com>
---
M src/vendorcode/google/chromeos/Kconfig
1 file changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/83705/28
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