Attention is currently required from: Andrey Petrov, Angel Pons, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Paul Menzel, Subrata Banik, Tarun.
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Code-Review+2 by Subrata Banik, Verified+1 by build bot (Jenkins)
Change subject: soc/intel/mtl: enable FSP uGOP config in MTL for eSOL
......................................................................
soc/intel/mtl: enable FSP uGOP config in MTL for eSOL
This patch updates the platform-specific Meteor Lake early
sign-of-life config (SOC_INTEL_METEORLAKE_SIGN_OF_LIFE) with a generic
ChromeOS eSOL config (CHROMEOS_ENABLE_ESOL) which uses the Intel FSP
UGOP driver as an underlying technology for rendering eSOL screen.
This patch does not change the binary or the system behaviour.
BUG=b:352651132
TEST=Able to build google/rex and checked the config in output.
Change-Id: Ib4589f52080229b1c83915b51272a042b7ac32cd
Signed-off-by: Jayvik Desai <jayvik(a)google.com>
---
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/meteorlake/romstage/fsp_params.c
2 files changed, 2 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/83769/24
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Change subject: vc/google/chromeos: Enable eSOL config with libgfx and uGOP
......................................................................
vc/google/chromeos: Enable eSOL config with libgfx and uGOP
This patch introduces a new early sign-of-life config option when
libgfx or uGOP is enabled for early graphics initialization.
BUG=b:352651132
TEST=Able to build google/rex and google/tivviks
Change-Id: Ic8fe4ca5234de7f8e579f950f6ccbf750f4c7950
Signed-off-by: Jayvik Desai <jayvik(a)google.com>
---
M src/vendorcode/google/chromeos/Kconfig
1 file changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/83705/29
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Change subject: [RFC] Add UPL FDT handoff
......................................................................
Patch Set 19:
(1 comment)
File payloads/Kconfig:
https://review.coreboot.org/c/coreboot/+/76591/comment/ce54d089_6827eccd?us… :
PS17, Line 194: # payload none only implies that we don't build with a payload, but it can later be added via CBFS, which makes creating handoff still necessary.
: choice
> You can't have both. Either you pass FDT as argument to the payload or coreboot tables.
In the coreboot leadership meeting in 2022 I already explained that it is either or situation. There were some concerns during that meeting, but in the end the agreement was as long as this is not seeing as deprecating coreboot table and this is just merely providing an extra option for user to choose, then it is fine.
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Roger Wang has posted comments on this change by Roger Wang. ( https://review.coreboot.org/c/coreboot/+/83792?usp=email )
Change subject: mb/google/nissa/var/sundance: Adjust WWAN GPIO sequence
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Looks like this is more over a completing WWAN power seq. […]
Hi Subrata,
Regarding the WWAN seq, it appears that setting it up RST in the bootblock may not be necessary. If we configure it from the bootblock, the sequence will be triggered at the same time.
The customer hopes that we can leave some buffer for EN to RST. Thanks
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Change subject: [RFC] Add UPL FDT handoff
......................................................................
Patch Set 19:
(1 comment)
Patchset:
PS17:
> In the review meeting, it was felt that we can continue forward with this path, but there are still […]
sorry but this is not true at all. UPL has locked on using FDT since 2022, and was also presented during OSFC 2022 with FDT, and it was well-received during the OSFC. I then created a mailing list around end of 2022 and has a huge discussion and eventually decided to go ahead in the coreboot leadership meeting. You can verify this with a few people attended the meeting, Julius also remembered the meeting discussion pretty well.
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Hello David Wu, Karthik Ramasubramanian, Ren Kuo, Shelley Chen,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brox/jubilant: Disable devcies and GPIOs by fw_config
......................................................................
mb/google/brox/jubilant: Disable devcies and GPIOs by fw_config
1.Set unused device's GPIOs to NC based on fw_config.
2.Disable config for nvme, ufs and CNVi based on fw_config.
3.Add fw_config STORAGE_UNKNOWN to enable all storages
for the first boot in factory.
BUG=None
TEST=emerge-brox coreboot chromeos-bootiamge
check fw_config messages in ap log
verify devices on/off by fw_config on jubilant
Change-Id: I8d9f4edea454e0861f91261bf13fa80572d0a181
Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brox/variants/jubilant/Makefile.mk
A src/mainboard/google/brox/variants/jubilant/fw_config.c
M src/mainboard/google/brox/variants/jubilant/overridetree.cb
M src/mainboard/google/brox/variants/jubilant/variant.c
4 files changed, 117 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/83874/6
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Change subject: mb/asus/p8z77-m: Light DRAM_LED during early boot
......................................................................
Patch Set 2: Code-Review+2
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Felix Singer has uploaded a new patch set (#11) to the change originally created by Michael Strosche. ( https://review.coreboot.org/c/coreboot/+/77374?usp=email )
Change subject: soc/intel/meteorlake/chip.h: Use boolean type where applicable
......................................................................
soc/intel/meteorlake/chip.h: Use boolean type where applicable
Change-Id: I15dfd5ed0541352930c3b70252b3e536ad1e6efd
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---
M src/soc/intel/meteorlake/chip.h
1 file changed, 37 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/77374/11
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