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Change subject: mb/google/brox/jubilant: Disable devcies and GPIOs by fw_config
......................................................................
mb/google/brox/jubilant: Disable devcies and GPIOs by fw_config
1.Set unused device's GPIOs to NC based on fw_config.
2.Disable config for nvme, ufs and CNVi based on fw_config.
3.Add fw_config STORAGE_UNKNOWN to enable all storages
for the first boot in factory.
BUG=None
TEST=emerge-brox coreboot chromeos-bootiamge
check fw_config messages in ap log
verify devices on/off by fw_config on jubilant
Change-Id: I8d9f4edea454e0861f91261bf13fa80572d0a181
Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brox/variants/jubilant/Makefile.mk
A src/mainboard/google/brox/variants/jubilant/fw_config.c
M src/mainboard/google/brox/variants/jubilant/overridetree.cb
M src/mainboard/google/brox/variants/jubilant/variant.c
4 files changed, 118 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/83874/8
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Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
mb/google/brox: Fix booting to kernel without battery
When battery is disconnected and only adaptor is connected higher PL2
power draw causes cpu brown out and system does not boot to kernel. To
avoid this set Boot frequency UPD to 1.Reduce PL4 value to overcome
power spikes from SoC during boot. Remove Psys implementation as it
impacts active state platform performance. For boot with battery
increase PL1 min value to 15 watts.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on 3 different Brox proto2 SKU1
and SKU2 boards with 65W, 45W and 30W adaptors for 3
iterations of cold boot.
Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/brox/ramstage.c
M src/soc/intel/alderlake/romstage/fsp_params.c
3 files changed, 67 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/83752/11
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: mb/google/dedede:Add fw_config control to wifi driver
......................................................................
mb/google/dedede:Add fw_config control to wifi driver
BUG=b:351968527
Change-Id: I4d79051222a797d8a7805815092915e59b605468
Signed-off-by: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/dedede/variants/awasuki/overridetree.cb
M src/mainboard/google/dedede/variants/awasuki/ramstage.c
2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/83797/3
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Attention is currently required from: Dinesh Gehlot.
Julius Werner has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/83864?usp=email )
Change subject: src: Log boot info before cse sync
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/83864/comment/0fc0065a_e60ab91b?us… :
PS1, Line 1434: elog_add_vboot_info();
You can't just remove these from platform-independent files and move them into an Intel-only file, you're gonna break all other platforms.
If you want to move these before CSE sync, it would probably be best to leave the code where it is and change the boot state hook to some event that occurs before CSE sync (e.g. `BS_PRE_DEVICE, BS_ON_ENTRY`).
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Julius Werner has posted comments on this change by Torsten Schenk. ( https://review.coreboot.org/c/coreboot/+/83379?usp=email )
Change subject: Makefile: unexport CFLAGS
......................................................................
Patch Set 1:
(1 comment)
File Makefile:
https://review.coreboot.org/c/coreboot/+/83379/comment/8846fb67_51cee334?us… :
PS1, Line 7: unexport CFLAGS
> I think this is the wrong way to go about this. […]
I agree in general. AFAIU the problem here isn't actually in coreboot, it's in libpayload which unfortunately still uses raw CFLAGS for firmware code. For that reason, I suggested that the libpayload Makefile should clear CFLAGS at the top instead. A better solution (but with more effort) would be to rewrite the libpayload Makefiles so they don't use raw CFLAGS at all, like coreboot.
For util/marvell/doimage_mv/Makefile.mk I think the current usage is fine because that's a host utility, there using CFLAGS from the environment is expected and consistent with how many Linux userspace utilities are built. Some (but not all) other coreboot userspace utilities do that too (e.g. cbmem).
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Hello Caveh Jalali, Dinesh Gehlot, Eric Herrmann, Forest Mittelberg, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Keith Short, Nick Vaccaro, Rishika Raj, Shelley Chen, Subrata Banik,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
mb/google/brox: Fix booting to kernel without battery
When battery is disconnected and only adaptor is connected higher PL2
power draw causes cpu brown out and system does not boot to kernel. To
avoid this set Boot frequency UPD to 1.Reduce PL4 value to overcome
power spikes from SoC during boot. Remove Psys implementation as it
impacts active state platform performance. For boot with battery
increase PL1 min value to 15 watts.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on 3 different Brox proto2 SKU1
and SKU2 boards with 65W, 45W and 30W adaptors for 3
iterations of cold boot.
Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/brox/ramstage.c
M src/soc/intel/alderlake/romstage/fsp_params.c
3 files changed, 65 insertions(+), 102 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/83752/10
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