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Change subject: Fix no-op for empty arg in Makefile conditional
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Patchset:
PS4:
Hi, thanks for the patch. The `:` should always work, however also always
lets make invoke another shell process, just to do nothing. What is your
exact evironment? make version, shell version? I couldn't reproduce this
with any make/shell combination. How could I reproduce the issue?
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Change subject: nb/intel/haswell: Move SPD addresses to devicetree
......................................................................
Patch Set 5:
(1 comment)
File src/northbridge/intel/haswell/raminit.h:
https://review.coreboot.org/c/coreboot/+/79025/comment/8fde7a5e_b7a6f53e?us… :
PS5, Line 19: get_spd_addresses
Is the `get_spd_info` identifier already used by something else? If not, I would use it here: the function also gets the SPD index for boards using memory-down.
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Change subject: arch/x86: Remove CONFIG_DEBUG_NULL_DEREF_HALT
......................................................................
arch/x86: Remove CONFIG_DEBUG_NULL_DEREF_HALT
For more than 2 years the option has been unconfigurable.
Since no one seems to have fixed that, the options seems to be
not needed by anyone. So instead of making it configurable now,
we can just as well remove it.
Change-Id: I4055d497c7c23e148d2a09f216c7b910a9b3ea9b
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
---
M src/arch/x86/Kconfig
M src/arch/x86/null_breakpoint.c
2 files changed, 2 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/83934/1
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 16d8a70..530f871 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -368,14 +368,6 @@
default y
depends on DEBUG_NULL_DEREF_BREAKPOINTS && DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES
-config DEBUG_NULL_DEREF_HALT
- bool
- default n
- depends on DEBUG_NULL_DEREF_BREAKPOINTS
- help
- When enabled null dereferences and instruction fetches will halt execution.
- Otherwise an error will be printed.
-
# Some EC need an "EC firmware pointer" (a data structure hinting the address
# of its firmware blobs) being put at a fixed position. Its space
# (__section__(".ecfw_ptr")) should be reserved if it lies in the range of a
diff --git a/src/arch/x86/null_breakpoint.c b/src/arch/x86/null_breakpoint.c
index 43e3727..44c7ae9 100644
--- a/src/arch/x86/null_breakpoint.c
+++ b/src/arch/x86/null_breakpoint.c
@@ -12,7 +12,7 @@
static int handle_fetch_breakpoint(struct breakpoint_handle handle, struct eregs *regs)
{
printk(BIOS_ERR, "Instruction fetch from address zero\n");
- return CONFIG(DEBUG_NULL_DEREF_HALT);
+ return 0;
}
static int handle_deref_breakpoint(struct breakpoint_handle handle, struct eregs *regs)
@@ -22,7 +22,7 @@
#else
printk(BIOS_ERR, "Null dereference at eip: 0x%x\n", regs->eip);
#endif
- return CONFIG(DEBUG_NULL_DEREF_HALT);
+ return 0;
}
static void create_deref_breakpoint(void)
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Change subject: Revert "commonlib/bsd: Add strcat() and strncat() functions"
......................................................................
Abandoned
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Change subject: Revert "commonlib/bsd: Add strlen() and strnlen() functions"
......................................................................
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Change subject: Revert "commonlib/bsd: Add strlen() and strnlen() functions"
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83930/comment/05697a11_ea0b36c9?us… :
PS3, Line 11: Reason for revert: b/359951393 breaking builds affecting many devices
> Okay. […]
ACK. Our infra expects. I should have used that formatting here. I know it won't cause issues with downstreaming/infra to change the wording, but I'm not sure if the bug will link correctly. I'll run an experiment and share some guidance with the internal team. Thanks for the feedback and suggestion.
```
BUG=b:359951393
```
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Change subject: commonlib/bsd/string: Fix pointer overflow for strnlen()
......................................................................
Patch Set 2:
(1 comment)
File src/commonlib/bsd/string.c:
https://review.coreboot.org/c/coreboot/+/83914/comment/d31851b5_ff314f06?us… :
PS1, Line 19: str + maxlen + 1
> Hmm... […]
Upon closer inspection, my suggestion had the same problem of dereferencing one more byte than intended. It's kind of tricky to resolve that while keeping the `*ptr++` intact and still having the exit calculation right in all cases. Best I could come up with was split the exit into two cases: see CB:83933 for my new suggestion.
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Hello Yu-Ping Wu,
I'd like you to do a code review.
Please visit
https://review.coreboot.org/c/coreboot/+/83933?usp=email
to review the following change.
Change subject: commonlib/bsd: Optimize strnlen()
......................................................................
commonlib/bsd: Optimize strnlen()
This patch changes the strnlen() implementation to fix a small issue
where we would dereference once more byte than intended when not finding
a NUL-byte within the specified amount of characters. It also changes
the implementation to rely on a pre-calculated end pointer rather than a
running counter, since this seems to lead to slightly better assembly
(one less instruction in the inner loop) on most architectures.
Change-Id: Ic36768fd3a26e2b64143904e78cd0b52ba66898d
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/commonlib/bsd/string.c
1 file changed, 13 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/83933/1
diff --git a/src/commonlib/bsd/string.c b/src/commonlib/bsd/string.c
index 56670e8..461c040 100644
--- a/src/commonlib/bsd/string.c
+++ b/src/commonlib/bsd/string.c
@@ -15,10 +15,19 @@
size_t strnlen(const char *str, size_t maxlen)
{
- size_t len = 0;
- while (*str++ && len < maxlen)
- len++;
- return len;
+ const char *ptr = str;
+ const char *end = str + maxlen;
+
+ if (!maxlen)
+ return 0;
+
+ while (*ptr++) {
+ /* Make sure this checks for ==, not >=, because the calculation
+ for `end` may overflow in some edge cases. */
+ if (ptr == end)
+ return ptr - str;
+ }
+ return ptr - str - 1;
}
char *strcat(char *dst, const char *src)
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Cliff Huang has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83635?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
......................................................................
Patch Set 82:
(1 comment)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83635/comment/6fa5d845_bbe0dcd7?us… :
PS82, Line 54: config SOC_INTEL_PANTHERLAKE_H
Can we add SOC_INTEL_PANTHERLAKE_U? Currently, we have
SOC_INTEL_PANTHERLAKE_U_H and SOC_INTEL_PANTHERLAKE_H that depends on !SOC_INTEL_PANTHERLAKE_U_H. It is not clear that we can select config just for PTL-U.
I am looking into Subrata's comment regarding of using Kconfig for UFS (https://review.coreboot.org/c/coreboot/+/83772/comment/ed78be7e_969260ce/)
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Change subject: nb/intel/haswell: Move SPD addresses to devicetree
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79025/comment/a9e91001_3714f705?us… :
PS4, Line 14: Patch also covers recently added Z97 boards using Broadwell MRC.
> I had to make a separate follow-up commit for Sandy Bridge because the original refactoring commits […]
Done
File src/northbridge/intel/haswell/broadwell_mrc/raminit.c:
https://review.coreboot.org/c/coreboot/+/79025/comment/433d669a_b6c10cc5?us… :
PS4, Line 377: struct spd_info spdi = {0};
: if (CONFIG(HAVE_SPD_IN_CBFS)) {
: /* Obtain the SPD addresses from mainboard code */
: mb_get_spd_map(&spdi);
: } else {
: /* Boards without memory down: Obtain the SPD addresses from devicetree */
: memcpy(spdi.addresses, cfg->spd_addresses, ARRAY_SIZE(spdi.addresses));
: }
:
> Yeah, it's to avoid having redundant copies of the source code that may end up out of sync. […]
Done. More aggressive refactoring would be done later, such as the little dance that load and invoke the actual MRC binary, and yes those platform and memory config reporting.
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