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Change subject: Update arm-trusted-firmware submodule to upstream master
......................................................................
Patch Set 1: Code-Review+2
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Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83577?usp=email )
Change subject: xcompile: Drop CC_RT_EXTRA_GCC for PPC64
......................................................................
xcompile: Drop CC_RT_EXTRA_GCC for PPC64
It looks like some unused artifact: The PPC64 Makefile.mk doesn't
pick it up. Also, the only other architecture using this (x86) has
linker flags there, not compiler flags.
Change-Id: I734542db9ee5b62d9a39d303d4092cd83dfef54b
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83577
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M util/xcompile/xcompile
1 file changed, 0 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Arthur Heymans: Looks good to me, approved
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile
index 3948811..b3012b5 100755
--- a/util/xcompile/xcompile
+++ b/util/xcompile/xcompile
@@ -415,7 +415,6 @@
TWIDTH="64"
TSUPP="ppc64"
TABI="linux-gnu" # there is no generic ABI on ppc64
- CC_RT_EXTRA_GCC="-mcpu=power8 -mbig-endian"
}
# Right now, the clang reference toolchain is not building compiler-rt builtins
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Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83613?usp=email )
Change subject: Update arm-trusted-firmware submodule to upstream master
......................................................................
Update arm-trusted-firmware submodule to upstream master
Updating from commit id 48f1bc9f5:
2024-05-02 10:13:54 +0200 - (Merge "feat(zynqmp): remove unused pm_get_proc_by_node()" into integration)
to commit id c5b8de86c:
2024-07-22 18:07:11 +0200 - (Merge "feat(debugv8p9): add support for FEAT_Debugv8p9" into integration)
This brings in 447 new commits.
Change-Id: I0a24e2b2b83d18d5ce8f3b1af710b5acde996ad0
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M 3rdparty/arm-trusted-firmware
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/83613/1
diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware
index fe4df8b..c5b8de8 160000
--- a/3rdparty/arm-trusted-firmware
+++ b/3rdparty/arm-trusted-firmware
@@ -1 +1 @@
-Subproject commit fe4df8bdae0a5d1d87c67c24fdd03595cd90dd08
+Subproject commit c5b8de86c8838d08d5d8c9d67c7a432817ee62b8
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Change subject: Update vboot submodule to upstream main
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/amd/psp_verstage: Add -Oz flag for clang
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Patch Set 2: Code-Review+2
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Change subject: soc/intel/mtl: Increase CAR_STACK_SIZE by 31KB for coreboot compatibility
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83540/comment/f8e06304_9fe93ecc?us… :
PS5, Line 7: soc/intel/meteorlake: Increase CAR STACK_SIZE by 31KB to meet coreboot requirements
> To clarify, there's no reason to make it 32 specifically, it just seems like a number that's big eno […]
Thanks, that's much clearer. I'm much more used to know how much stack we need.
We used to measure that and I believe static analysis would be possible too.
Maybe it's worth to check at least a little canary after FSP-M ran.
Having something 4KiB big on the CAR stack seems uncommon these days, as we
fully support .bss know AFAIK. So I'd rather move the UPD struct there, but
that might just be personal preference.
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Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83612?usp=email )
Change subject: Update vboot submodule to upstream main
......................................................................
Update vboot submodule to upstream main
Updating from commit id b6f44e62:
2024-07-01 04:30:14 +0000 - (futility: updater: Increase try count from 8 to 10)
to commit id 4b12d392:
2024-07-17 01:47:56 +0000 - (scripts: Add a script to convert a vbprivk to a PEM)
This brings in 9 new commits:
4b12d392 scripts: Add a script to convert a vbprivk to a PEM
033d7bfa futility: updater: Increase try count from 10 to 11
f63e088e treewide: Ensure a space after if/for/while keywords
17a45712 2auxfw_sync: Clear display request before EC reset
e529f947 2ec_sync: Reactivate VB2_CONTEXT_EC_SYNC_SLOW
ca2d42d1 Android: Explicitly disable v1/v2 signing when using apksigner
fc7a7a5d futility: flash: Print ro_start and ro_len for debug
86542905 Migrate to new Android.bp build system
aa35a020 host/lib/host_p11_stub: Add missing includes
Change-Id: Ida8a27dcb0acf83022aff0118827e3d310fae1a5
Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org>
---
M 3rdparty/vboot
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/83612/1
diff --git a/3rdparty/vboot b/3rdparty/vboot
index b6f44e6..4b12d39 160000
--- a/3rdparty/vboot
+++ b/3rdparty/vboot
@@ -1 +1 @@
-Subproject commit b6f44e62650e563cca651bd4349c418450dd1bd3
+Subproject commit 4b12d392e5b12de29c582df4e717b1228e9f1594
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Change subject: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS
......................................................................
Patch Set 8:
(1 comment)
File src/soc/amd/common/vboot/vbnv_cmos.c:
https://review.coreboot.org/c/coreboot/+/83495/comment/fac969ba_ef1906f4?us… :
PS4, Line 16: cmos_write(RTC_FREQ_SELECT_AMD, RTC_FREQ_SELECT);
> ``` […]
We cannot change the stack address because that's shared with the PSP bootloader. The clang build problem is now fixed by adding the `-Oz` flag for clang (CB:83594).
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Sowmya Aralguppe has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/83406?usp=email )
Change subject: mb/google/brox: Reduce PL values for booting without battery
......................................................................
Abandoned
According to PNP team ,Changing Power limits for System and SoC is not the right solution - hence Abandoning this CL
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Change subject: soc/amd/psp_verstage: Add -Oz flag for clang
......................................................................
Patch Set 2: Code-Review+2
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