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Hello Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#9).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
......................................................................
soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
List of changes:
1. Add required Pather Lake SoC programming till bootblock.
2. Include only required headers into include/soc.
3. Include PTL related DID, BDF.
4. Ref: Processor EDS documents
vol0.51 #815002
BUG=b:348678529
TEST=verified on Panther Lake Simics PSS using google/fatcat mainboard.
Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com>
---
M src/soc/intel/meteorlake/bootblock/soc_die.c
A src/soc/intel/pantherlake/Kconfig
A src/soc/intel/pantherlake/Makefile.mk
A src/soc/intel/pantherlake/bootblock/bootblock.c
A src/soc/intel/pantherlake/bootblock/pcd.c
A src/soc/intel/pantherlake/bootblock/report_platform.c
A src/soc/intel/pantherlake/espi.c
A src/soc/intel/pantherlake/include/soc/bootblock.h
A src/soc/intel/pantherlake/include/soc/iomap.h
A src/soc/intel/pantherlake/include/soc/p2sb.h
A src/soc/intel/pantherlake/include/soc/pci_devs.h
A src/soc/intel/pantherlake/include/soc/pcr_ids.h
A src/soc/intel/pantherlake/include/soc/pm.h
A src/soc/intel/pantherlake/include/soc/smbus.h
A src/soc/intel/pantherlake/include/soc/soc_info.h
A src/soc/intel/pantherlake/soc_info.c
16 files changed, 1,249 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83354/9
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Change subject: soc/intel/common/block/cse: allow CSE telemetry on non-lite CSE SKU
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
@krishna.p.bhat.d@intel.com can you please check if this cse lite cmd to retrieve the telemetry also checked into cse consumer sku from mtl onwards? I'm certain cse team said this is cse lite feature, I wish to ensure that those implementation are same between cse lite and cse consumer.
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Change subject: gma power: Allow to explicitly enable DDI/Aux power
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Don't forget the regression testing...
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Change subject: gma: Do detection and connectors init after `All_Off'
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Should do some regression testing for other platforms.
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Change subject: gma: Get DPCD 1.1+ displays out of D3
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/libgfxinit/+/83596/comment/869ecf18_63bb1e19?… :
PS1, Line 10: OS'
> I like using `OSes`, but I'm not going to force you to destroy the text alignment
`OSs` would have fit too.
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Nico Huber has submitted this change. ( https://review.coreboot.org/c/libgfxinit/+/83596?usp=email )
Change subject: gma: Get DPCD 1.1+ displays out of D3
......................................................................
gma: Get DPCD 1.1+ displays out of D3
DPCD 1.1 added a field to switch the DP sink into D3 and back. Linux
(and potentially other OS') apparently makes use of it when shutting
down, also for a reboot. This can lead to display failures in core-
boot on a reboot. So we signal any DPCD 1.1+ display unconditionally
to go into D0 before DP training.
Change-Id: Ieec3813ba99ed3a2c6f701cb34a5e2b226fc14c0
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/83596
Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com>
Tested-by: Nico Huber <nico.h(a)gmx.de>
---
M common/hw-gfx-gma-connector_info.adb
1 file changed, 22 insertions(+), 0 deletions(-)
Approvals:
Nico Huber: Verified
Matt DeVillier: Looks good to me, approved
Angel Pons: Looks good to me, approved
Arthur Heymans: Looks good to me, approved
diff --git a/common/hw-gfx-gma-connector_info.adb b/common/hw-gfx-gma-connector_info.adb
index 47292f6..7122eac 100644
--- a/common/hw-gfx-gma-connector_info.adb
+++ b/common/hw-gfx-gma-connector_info.adb
@@ -12,10 +12,13 @@
-- GNU General Public License for more details.
--
+with HW.GFX.DP_Defs;
+
with HW.GFX.GMA.Config;
with HW.GFX.GMA.Panel;
with HW.GFX.GMA.DP_Dual_Mode;
with HW.GFX.GMA.DP_Info;
+with HW.GFX.GMA.DP_Aux_Ch;
with HW.Debug;
with GNAT.Source_Info;
@@ -26,6 +29,8 @@
(Port_Cfg : in out Port_Config;
Success : out Boolean)
is
+ use type Word8;
+
DP_Port : constant GMA.DP_Port :=
(if Config.Has_Type_C_Ports
then
@@ -76,6 +81,23 @@
Success => Success);
pragma Debug (Success, DP_Info.Dump_Link_Setting (Port_Cfg.DP));
end if;
+
+ -- Get DP sinks out of power-save mode
+ if Success and Port_Cfg.DP.Receiver_Caps.Rev >= 16#11# then
+ declare
+ DPCD_SINK_CONTROL : constant := 16#00600#;
+ DPCD_SINK_CONTROL_D0 : constant DP_Defs.Aux_Payload :=
+ (1 * 2 ** 0, others => 0);
+ Ignored : Boolean;
+ begin
+ DP_Aux_Ch.Aux_Write
+ (Port => DP_Port,
+ Address => DPCD_SINK_CONTROL,
+ Length => 1,
+ Data => DPCD_SINK_CONTROL_D0,
+ Success => Ignored);
+ end;
+ end if;
else
Success := True;
end if;
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Change subject: gma: Get DPCD 1.1+ displays out of D3
......................................................................
Patch Set 1: Verified+1
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Change subject: gma: Re-structure TC port types
......................................................................
Patch Set 1:
(1 comment)
File common/hw-gfx-gma-config_helpers.adb:
https://review.coreboot.org/c/libgfxinit/+/83599/comment/2c237208_e29d5715?… :
PS1, Line 68:
: when DP_TC1 | HDMI_TC1 | USBC1 => DDI_TC3,
: when DP_TC2 | HDMI_TC2 | USBC2 => DDI_TC4,
: when DP_TC3 | HDMI_TC3 | USBC3 => DDI_TC5,
: when DP_TC4 | HDMI_TC4 | USBC4 => DDI_TC6,
> ADL-P (XeLPD) doesn't even have TC5 .. TC6 so it definitely feels wrong. […]
Yes, the TGL PRM seems actually the only source that talks about 6 TC ports /
register sets. I guess they just wanted to be prepared. Now I'm wondering if
it's wise to keep the additional register definitions in the TGL code. I guess
we'll see during review.
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