Attention is currently required from: Ashish Kumar Mishra, Felix Held, Paul Menzel, Saurabh Mishra, Subrata Banik.
Hello Felix Held, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: mb/google/fatcat: Add Panther Lake SOC support
......................................................................
mb/google/fatcat: Add Panther Lake SOC support
Details:
- This patch updates the original google/fatcat support added
with Meteor Lake support as a workaround.
- Adds initial support to build google/fatcat for Panther Lake SOC based
board till bootblock stage.
BUG=b:348678529
TEST=Able to build the google/fatcat and boot to bootblock stage
using Intel® Simics® Pre Silicon Simulation platform for PTL.
Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d5e
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com>
---
M src/mainboard/google/fatcat/Kconfig
M src/mainboard/google/fatcat/mainboard.c
M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
M src/mainboard/google/fatcat/variants/baseboard/include/baseboard/variants.h
4 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/83419/8
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Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun.
Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83354?usp=email
to look at the new patch set (#10).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
......................................................................
soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
List of changes:
1. Add required Pather Lake SoC programming till bootblock.
2. Include only required headers into include/soc.
3. Include PTL related DID, BDF.
4. Ref: Processor EDS documents
vol0.51 #815002
BUG=b:348678529
TEST=verified on Panther Lake Simics PSS using google/fatcat mainboard.
Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com>
---
M src/soc/intel/meteorlake/bootblock/soc_die.c
A src/soc/intel/pantherlake/Kconfig
A src/soc/intel/pantherlake/Makefile.mk
A src/soc/intel/pantherlake/bootblock/bootblock.c
A src/soc/intel/pantherlake/bootblock/pcd.c
A src/soc/intel/pantherlake/bootblock/report_platform.c
A src/soc/intel/pantherlake/espi.c
A src/soc/intel/pantherlake/include/soc/bootblock.h
A src/soc/intel/pantherlake/include/soc/iomap.h
A src/soc/intel/pantherlake/include/soc/p2sb.h
A src/soc/intel/pantherlake/include/soc/pci_devs.h
A src/soc/intel/pantherlake/include/soc/pcr_ids.h
A src/soc/intel/pantherlake/include/soc/pm.h
A src/soc/intel/pantherlake/include/soc/smbus.h
A src/soc/intel/pantherlake/include/soc/soc_info.h
A src/soc/intel/pantherlake/soc_info.c
16 files changed, 1,249 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83354/10
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Attention is currently required from: Angel Pons, Dinesh Gehlot, Jérémy Compostella, Nick Vaccaro, Tarun Tuli, Tim Wawrzynczak.
Nico Huber has posted comments on this change by Tim Wawrzynczak. ( https://review.coreboot.org/c/libgfxinit/+/67494?usp=email )
Change subject: gma pipe_setup: Update for TGL & ADL
......................................................................
Patch Set 35:
(2 comments)
File common/hw-gfx-gma-pipe_setup.adb:
https://review.coreboot.org/c/libgfxinit/+/67494/comment/98511f23_de7d12c2?… :
PS32, Line 249: PLANE_CTL_PLANE_ENABLE
> Lost in last refactoring. […]
Fixed
https://review.coreboot.org/c/libgfxinit/+/67494/comment/6a5954d5_cee2b13d?… :
PS32, Line 266: Value => 0);
> Moving this out of the if, because PLANE_AUX_DIST seems to exist since `Has_Plane_Control` and shoul […]
Acknowledged
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Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de>
Attention is currently required from: Nico Huber.
Hello Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/libgfxinit/+/83597?usp=email
to look at the new patch set (#2).
Change subject: gfxtest: Handle 64-bit aperture base and register location
......................................................................
gfxtest: Handle 64-bit aperture base and register location
Commit 1b65b84bc2 (gma: Update BDSM register offset for TGL onwards)
updated libgfxinit for a new aperture base register, but gfxtest was
missed. Update here as well.
Change-Id: I4c92190719bd2a066f77061a86b38faa59c6dfb8
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M gfxtest/hw-gfx-gma-gfx_test.adb
1 file changed, 9 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/97/83597/2
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Gerrit-Change-Number: 83597
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
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Gerrit-Attention: Nico Huber <nico.h(a)gmx.de>
Attention is currently required from: Angel Pons.
Hello Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/libgfxinit/+/83599?usp=email
to look at the new patch set (#2).
The following approvals got outdated and were removed:
Code-Review+1 by Angel Pons
Change subject: gma: Re-structure TC port types
......................................................................
gma: Re-structure TC port types
The `USBC1_DP/_HDMI' names did not draw an accurate picture. If
they are implemented as legacy ports (for HDMI always the case),
they don't show as USBC in schematics, the OS or anywhere else.
We also couldn't tell if a `USBCx_DP' was implemented as legacy
or USB-C.
We split them by actual, physical connector type now: HDMI, DP,
and USBC (for DP-Alt mode). The `_TCx' suffixes should provide
an idea where they are connected to a socket or SoC.
Tiger Lake and seemingly Alder Lake use the first 4 TC register
sets only. Hence we keep only 4 respective TC ports for now.
Also, as any of the 3 Combo-PHYs (DP1..3) can be used as eDP, we
map that to the port, that is used with the first set of panel-
control lines. This should hopefully match most board designs.
Change-Id: If9755fe8e1f9252e6e77e22fe910964ad3c3743b
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M common/hw-gfx-gma-config.ads.template
M common/hw-gfx-gma-config_helpers.adb
M common/hw-gfx-gma.adb
M common/hw-gfx-gma.ads
M configs/tigerlake
5 files changed, 76 insertions(+), 75 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/99/83599/2
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