Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83612?usp=email )
Change subject: Update vboot submodule to upstream main
......................................................................
Update vboot submodule to upstream main
Updating from commit id b6f44e62:
2024-07-01 04:30:14 +0000 - (futility: updater: Increase try count from 8 to 10)
to commit id 4b12d392:
2024-07-17 01:47:56 +0000 - (scripts: Add a script to convert a vbprivk to a PEM)
This brings in 9 new commits:
4b12d392 scripts: Add a script to convert a vbprivk to a PEM
033d7bfa futility: updater: Increase try count from 10 to 11
f63e088e treewide: Ensure a space after if/for/while keywords
17a45712 2auxfw_sync: Clear display request before EC reset
e529f947 2ec_sync: Reactivate VB2_CONTEXT_EC_SYNC_SLOW
ca2d42d1 Android: Explicitly disable v1/v2 signing when using apksigner
fc7a7a5d futility: flash: Print ro_start and ro_len for debug
86542905 Migrate to new Android.bp build system
aa35a020 host/lib/host_p11_stub: Add missing includes
Change-Id: Ida8a27dcb0acf83022aff0118827e3d310fae1a5
Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83612
Reviewed-by: Yidi Lin <yidilin(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M 3rdparty/vboot
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Yidi Lin: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/3rdparty/vboot b/3rdparty/vboot
index b6f44e6..4b12d39 160000
--- a/3rdparty/vboot
+++ b/3rdparty/vboot
@@ -1 +1 @@
-Subproject commit b6f44e62650e563cca651bd4349c418450dd1bd3
+Subproject commit 4b12d392e5b12de29c582df4e717b1228e9f1594
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Gerrit-MessageType: merged
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Gerrit-Change-Id: Ida8a27dcb0acf83022aff0118827e3d310fae1a5
Gerrit-Change-Number: 83612
Gerrit-PatchSet: 2
Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com>
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83609?usp=email )
Change subject: util/autoport/*.md: List Haswell as supported
......................................................................
util/autoport/*.md: List Haswell as supported
As of commit 3f0bb2fb0741 (autoport: Add support for Haswell-Lynx Point
platform), autoport supports Haswell in addition to Sandy Bridge and Ivy
Bridge.
Change-Id: Iccc10441389580ff8e89c3718484d25d20970f68
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83609
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M util/autoport/description.md
M util/autoport/readme.md
2 files changed, 3 insertions(+), 3 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
diff --git a/util/autoport/description.md b/util/autoport/description.md
index 9a0e8d4..361a9f2 100644
--- a/util/autoport/description.md
+++ b/util/autoport/description.md
@@ -1 +1 @@
-Automated porting coreboot to Sandy Bridge/Ivy Bridge platforms `Go`
+Automated porting coreboot to Sandy Bridge/Ivy Bridge/Haswell platforms `Go`
diff --git a/util/autoport/readme.md b/util/autoport/readme.md
index 149e1ca..b755d43 100644
--- a/util/autoport/readme.md
+++ b/util/autoport/readme.md
@@ -3,8 +3,8 @@
## Supported platforms
### Chipset
-For any Sandy Bridge or Ivy Bridge platform the generated result should
-be bootable, possibly with minor fixes.
+For any Sandy Bridge, Ivy Bridge, or Haswell platform the generated result
+should be bootable, possibly with minor fixes.
### EC / SuperIO
EC support is likely to work on Intel-based thinkpads. Other laptops are
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Angel Pons has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83610?usp=email )
Change subject: soc/intel/xeon_sp/Kconfig: Disable ANSI escape code
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83610/comment/2a8b4a8e_badffdc1?us… :
PS1, Line 9: To remove ANSI escape sequences (like `ESC [1m`) from boot log.
> Personally i also dont like this, this makes my log very ugly and hard to read. […]
Using site-local is actually surprisingly simple. Add the following in `site-local/Kconfig` (create folder and file if needed):
```
config CONSOLE_USE_ANSI_ESCAPES
default n
```
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Filip Lewiński has posted comments on this change by Filip Lewiński. ( https://review.coreboot.org/c/coreboot/+/82694?usp=email )
Change subject: src/security/intel/txt/romstage.c: make romstage init work on SOC_INTEL platforms
......................................................................
Patch Set 2:
This change is ready for review.
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Change subject: soc/intel/xeon_sp/Kconfig: Disable ANSI escape code
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83610/comment/64456959_05b735b8?us… :
PS1, Line 9: To remove ANSI escape sequences (like `ESC [1m`) from boot log.
> What is the motivation? It's generally a useful feature.
Personally i also dont like this, this makes my log very ugly and hard to read. However, like Angel said, unless there is a technical requirement to disable this, you can either use site local or just use the defconfig to do it
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Change subject: soc/intel/xeon_sp: Add acpigen_write_pci_root_port
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/xeon_sp/acpi.c:
https://review.coreboot.org/c/coreboot/+/82252/comment/851d782b_3e01c244?us… :
PS4, Line 194: acpigen_write_BBN
> Yeah ... there are indeed issues around here. […]
Hi Patrick, in patch set 5, I removed the _BBN generation for PCI root port for alignment for UEFI implementation and ACPI spec, (hence _SEG is not needed as well). Could you please check if this is okay?
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Attention is currently required from: Sean Rhodes.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74445?usp=email
to look at the new patch set (#7).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant
......................................................................
mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant
Tested using `edk2` from
`github.com/starlabsltd/edk2/tree/uefipayload_202209`:
* Windows 10
* Ubuntu 20.04
* MX Linux 19.4
* Manjaro 21
No known issues.
https://starlabs.systems/pages/starfighter-specification
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: I046e70845a5201d6f6ab062aee91fa8be9728737
---
M Documentation/mainboard/index.md
A Documentation/mainboard/starlabs/starfighter_rpl.md
A src/mainboard/starlabs/starfighter/Kconfig
A src/mainboard/starlabs/starfighter/Kconfig.name
A src/mainboard/starlabs/starfighter/Makefile.mk
A src/mainboard/starlabs/starfighter/acpi/ec.asl
A src/mainboard/starlabs/starfighter/acpi/mainboard.asl
A src/mainboard/starlabs/starfighter/acpi/sleep.asl
A src/mainboard/starlabs/starfighter/acpi/superio.asl
A src/mainboard/starlabs/starfighter/board_info.txt
A src/mainboard/starlabs/starfighter/bootblock.c
A src/mainboard/starlabs/starfighter/cmos.default
A src/mainboard/starlabs/starfighter/cmos.layout
A src/mainboard/starlabs/starfighter/dsdt.asl
A src/mainboard/starlabs/starfighter/hda_verb.c
A src/mainboard/starlabs/starfighter/include/variants.h
A src/mainboard/starlabs/starfighter/mainboard.c
A src/mainboard/starlabs/starfighter/smbios.c
A src/mainboard/starlabs/starfighter/spd/16gb.spd.hex
A src/mainboard/starlabs/starfighter/spd/32gb.spd.hex
A src/mainboard/starlabs/starfighter/spd/64gb.spd.hex
A src/mainboard/starlabs/starfighter/spd/Makefile.mk
A src/mainboard/starlabs/starfighter/variants/rpl/Makefile.mk
A src/mainboard/starlabs/starfighter/variants/rpl/board.fmd
A src/mainboard/starlabs/starfighter/variants/rpl/data.vbt
A src/mainboard/starlabs/starfighter/variants/rpl/devicetree.cb
A src/mainboard/starlabs/starfighter/variants/rpl/devtree.c
A src/mainboard/starlabs/starfighter/variants/rpl/gpio.c
A src/mainboard/starlabs/starfighter/variants/rpl/hda_verb.c
A src/mainboard/starlabs/starfighter/variants/rpl/ramstage.c
A src/mainboard/starlabs/starfighter/variants/rpl/romstage.c
A src/mainboard/starlabs/starfighter/vboot.c
32 files changed, 1,777 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/74445/7
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