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Change subject: soc/intel/xeon_sp/Kconfig: Disable ANSI escape code
......................................................................
Patch Set 1:
(2 comments)
File src/soc/intel/xeon_sp/Kconfig:
https://review.coreboot.org/c/coreboot/+/83610/comment/cc65bf38_33de3cb3?us… :
PS1, Line 113: config CONSOLE_USE_ANSI_ESCAPES
Unless there is a technical requirement to disable this *for the entire Xeon-SP family*, I would highly recommend using site-local instead: https://doc.coreboot.org/tutorial/managing_local_additions.htmlhttps://review.coreboot.org/c/coreboot/+/83610/comment/de1d4bde_4685bcc9?us… :
PS1, Line 114: bool "Use ANSI escape sequences for console highlighting"
Repeating the type/prompt is not necessary.
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Change subject: soc/intel/xeon_sp/Kconfig: Disable ANSI escape code
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83610/comment/abe7e4d7_c4388baa?us… :
PS1, Line 9: To remove ANSI escape sequences (like `ESC [1m`) from boot log.
What is the motivation? It's generally a useful feature.
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Hello Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80705?usp=email
to look at the new patch set (#14).
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Change subject: mb/starlabs/byte_adl: Add Alder Lake N Byte Mk II
......................................................................
mb/starlabs/byte_adl: Add Alder Lake N Byte Mk II
Tested using `edk2` from
`github.com/starlabsltd/edk2/tree/uefipayload_vs`:
* Windows 11
* Ubuntu 22.04
* Manjaro 22
No known issues.
https://starlabs.systems/pages/byte-specification
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: Idff2d883a8c29f0fee9d633708aac92061a45132
---
M Documentation/mainboard/index.md
A Documentation/mainboard/starlabs/byte_adl.md
A src/mainboard/starlabs/byte_adl/Kconfig
A src/mainboard/starlabs/byte_adl/Kconfig.name
A src/mainboard/starlabs/byte_adl/Makefile.mk
A src/mainboard/starlabs/byte_adl/acpi/cnvi.asl
A src/mainboard/starlabs/byte_adl/acpi/ec.asl
A src/mainboard/starlabs/byte_adl/acpi/mainboard.asl
A src/mainboard/starlabs/byte_adl/acpi/sleep.asl
A src/mainboard/starlabs/byte_adl/acpi/superio.asl
A src/mainboard/starlabs/byte_adl/board_info.txt
A src/mainboard/starlabs/byte_adl/bootblock.c
A src/mainboard/starlabs/byte_adl/cmos.default
A src/mainboard/starlabs/byte_adl/cmos.layout
A src/mainboard/starlabs/byte_adl/dsdt.asl
A src/mainboard/starlabs/byte_adl/hda_verb.c
A src/mainboard/starlabs/byte_adl/include/variants.h
A src/mainboard/starlabs/byte_adl/mainboard.c
A src/mainboard/starlabs/byte_adl/smbios.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/Makefile.mk
A src/mainboard/starlabs/byte_adl/variants/mk_ii/board.fmd
A src/mainboard/starlabs/byte_adl/variants/mk_ii/data.vbt
A src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb
A src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/hda_verb.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/vboot.fmd
A src/mainboard/starlabs/byte_adl/vboot.c
29 files changed, 1,554 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/80705/14
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Subrata Banik has posted comments on this change by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/82898?usp=email )
Change subject: soc/intel/common/block/cse: allow CSE telemetry on non-lite CSE SKU
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Yes, this command is supported on both Lite SKU and Consumer SKU.
Acknowledged
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Change subject: soc/intel/common/block/cse: allow CSE telemetry on non-lite CSE SKU
......................................................................
Patch Set 1: Code-Review+2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74445?usp=email
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Change subject: mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant
......................................................................
mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant
Tested using `edk2` from
`github.com/starlabsltd/edk2/tree/uefipayload_202209`:
* Windows 10
* Ubuntu 20.04
* MX Linux 19.4
* Manjaro 21
No known issues.
https://starlabs.systems/pages/starfighter-specification
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: I046e70845a5201d6f6ab062aee91fa8be9728737
---
M Documentation/mainboard/index.md
A Documentation/mainboard/starlabs/starfighter_rpl.md
A src/mainboard/starlabs/starfighter/Kconfig
A src/mainboard/starlabs/starfighter/Kconfig.name
A src/mainboard/starlabs/starfighter/Makefile.mk
A src/mainboard/starlabs/starfighter/acpi/ec.asl
A src/mainboard/starlabs/starfighter/acpi/mainboard.asl
A src/mainboard/starlabs/starfighter/acpi/sleep.asl
A src/mainboard/starlabs/starfighter/acpi/superio.asl
A src/mainboard/starlabs/starfighter/board_info.txt
A src/mainboard/starlabs/starfighter/bootblock.c
A src/mainboard/starlabs/starfighter/cmos.default
A src/mainboard/starlabs/starfighter/cmos.layout
A src/mainboard/starlabs/starfighter/dsdt.asl
A src/mainboard/starlabs/starfighter/hda_verb.c
A src/mainboard/starlabs/starfighter/include/variants.h
A src/mainboard/starlabs/starfighter/mainboard.c
A src/mainboard/starlabs/starfighter/smbios.c
A src/mainboard/starlabs/starfighter/spd/16gb.spd.hex
A src/mainboard/starlabs/starfighter/spd/32gb.spd.hex
A src/mainboard/starlabs/starfighter/spd/64gb.spd.hex
A src/mainboard/starlabs/starfighter/spd/Makefile.mk
A src/mainboard/starlabs/starfighter/variants/rpl/Makefile.mk
A src/mainboard/starlabs/starfighter/variants/rpl/board.fmd
A src/mainboard/starlabs/starfighter/variants/rpl/data.vbt
A src/mainboard/starlabs/starfighter/variants/rpl/devicetree.cb
A src/mainboard/starlabs/starfighter/variants/rpl/devtree.c
A src/mainboard/starlabs/starfighter/variants/rpl/gpio.c
A src/mainboard/starlabs/starfighter/variants/rpl/hda_verb.c
A src/mainboard/starlabs/starfighter/variants/rpl/ramstage.c
A src/mainboard/starlabs/starfighter/variants/rpl/romstage.c
A src/mainboard/starlabs/starfighter/vboot.c
32 files changed, 1,734 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/74445/6
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Hello Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#12).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: mb/starlabs/byte_adl: Add Alder Lake N Byte Mk II
......................................................................
mb/starlabs/byte_adl: Add Alder Lake N Byte Mk II
Tested using `edk2` from
`github.com/starlabsltd/edk2/tree/uefipayload_vs`:
* Windows 11
* Ubuntu 22.04
* Manjaro 22
No known issues.
https://starlabs.systems/pages/byte-specification
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: Idff2d883a8c29f0fee9d633708aac92061a45132
---
M Documentation/mainboard/index.md
A Documentation/mainboard/starlabs/byte_adl.md
A src/mainboard/starlabs/byte_adl/Kconfig
A src/mainboard/starlabs/byte_adl/Kconfig.name
A src/mainboard/starlabs/byte_adl/Makefile.mk
A src/mainboard/starlabs/byte_adl/acpi/cnvi.asl
A src/mainboard/starlabs/byte_adl/acpi/ec.asl
A src/mainboard/starlabs/byte_adl/acpi/mainboard.asl
A src/mainboard/starlabs/byte_adl/acpi/sleep.asl
A src/mainboard/starlabs/byte_adl/acpi/superio.asl
A src/mainboard/starlabs/byte_adl/board_info.txt
A src/mainboard/starlabs/byte_adl/bootblock.c
A src/mainboard/starlabs/byte_adl/cmos.default
A src/mainboard/starlabs/byte_adl/cmos.layout
A src/mainboard/starlabs/byte_adl/dsdt.asl
A src/mainboard/starlabs/byte_adl/hda_verb.c
A src/mainboard/starlabs/byte_adl/include/variants.h
A src/mainboard/starlabs/byte_adl/mainboard.c
A src/mainboard/starlabs/byte_adl/smbios.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/Makefile.mk
A src/mainboard/starlabs/byte_adl/variants/mk_ii/board.fmd
A src/mainboard/starlabs/byte_adl/variants/mk_ii/data.vbt
A src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb
A src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/hda_verb.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
A src/mainboard/starlabs/byte_adl/variants/mk_ii/vboot.fmd
A src/mainboard/starlabs/byte_adl/vboot.c
29 files changed, 1,554 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/80705/12
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yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83320?usp=email )
Change subject: soc/intel/common/block/imc: Add Integrated Memory Controller driver
......................................................................
Patch Set 8:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83320/comment/6b4adccc_fa25a41f?us… :
PS2, Line 7: src/
> Remove "src"
Done
File src/soc/intel/common/block/imc/Kconfig:
https://review.coreboot.org/c/coreboot/+/83320/comment/2c550d27_6cc718ca?us… :
PS3, Line 4: bool
> There was an imc.h, but seems no one is using it. soc/intel/common/block/include/intelblocks/imc.h. […]
IMC is originally added by commit f377fafd941a44252c4c7527ba08f798d222e7ff to support Intel Xeon Processor D-1500 Product Family and removed, maybe you can check it with your team.
I'm also not sure whether it's general enough to be in common block, I just want to reuse the header.
File src/soc/intel/common/block/imc/imc.c:
https://review.coreboot.org/c/coreboot/+/83320/comment/a79dadc4_34d06506?us… :
PS2, Line 20: (1 << 29)
> BIT(29)
Done
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yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83318?usp=email )
Change subject: soc/intel/common/systemagent: Improve systemagent
......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/common/block/systemagent/systemagent_def.h:
https://review.coreboot.org/c/coreboot/+/83318/comment/f2b7ad5d_4a57b030?us… :
PS3, Line 73: * IS_LIMIT = If registers/offset indicates address limit or address limit plus 1.
> Not sure if below pattern fits for all limit cases or not. […]
That doesn't make sense since all values here should be aligned.
In SNR, the limit address register is read as 0x7C00_0000. According to EDS, "any 32-bit transaction that satisfies '0 <= Address[31:26] <= TOLM[31:26]' is a transaction towards main memory", thus we should treat the lower bits as 1s, that means the TOLUD is 0x8000_0000.
From existing code, we can infer the register value is 0x8000_0000.
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