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Change subject: ec/dasharo/ec: add Dasharo features
......................................................................
Patch Set 11:
(2 comments)
File src/ec/dasharo/ec/acpi/ec.asl:
https://review.coreboot.org/c/coreboot/+/82672/comment/933e04d4_c404e201?us… :
PS10, Line 95: ^^^^DASH.RSET()
> It would, if any of the devices we support had an airplane mode led :| Removed all dead airplane mod […]
Done
File src/ec/dasharo/ec/dasharo_ec.c:
https://review.coreboot.org/c/coreboot/+/82672/comment/7cb3f7be_24c25a73?us… :
PS10, Line 200: #define SPI_ACCESS_SIZE 252
> Changed to `(DASHARO_EC_SIZE - REG_DATA - 2)` and added a comment explaining the `2`
Done
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Change subject: mb/intel/beechnutcity_crb: Update SMBIOS type 0,1,2,3 info
......................................................................
Patch Set 5:
(3 comments)
File src/mainboard/intel/beechnutcity_crb/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83327/comment/d204ef80_7363f639?us… :
PS5, Line 14: return "UNKNOWN";
Default if unset is the coreboot version, which IMHO is more useful than "UNKNOWN": https://github.com/coreboot/coreboot/blob/c19e32e69d8a9e42346fe81432bbdfc1e…https://review.coreboot.org/c/coreboot/+/83327/comment/31b46095_383886d6?us… :
PS5, Line 24: return "UNKNOWN";
Most of these default to empty strings. Will this code be changed in the future (e.g. when details are no longer embargoed)? If so, maybe add TODO comments to clarify this is temporary.
If this will not be updated, is there a reason to return `"UNKNOWN"` instead of `""`?
https://review.coreboot.org/c/coreboot/+/83327/comment/ee515352_42cefae9?us… :
PS5, Line 52: u8 smbios_chassis_power_cords(void)
: {
: return 1;
: }
Same as default, can be omitted: https://github.com/coreboot/coreboot/blob/c19e32e69d8a9e42346fe81432bbdfc1e…
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Change subject: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS
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Patch Set 9: Code-Review+2
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Change subject: mb/intel/avenuecity_crb: Update SMBIOS type 0,1,2,3 info
......................................................................
Patch Set 5:
(3 comments)
File src/mainboard/intel/avenuecity_crb/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83328/comment/9466d6a7_b11a408a?us… :
PS5, Line 12: const char *smbios_mainboard_bios_version(void)
: {
: return "UNKNOWN";
: }
Default if unset is the coreboot version, which IMHO is more useful than "UNKNOWN": https://github.com/coreboot/coreboot/blob/c19e32e69d8a9e42346fe81432bbdfc1e…https://review.coreboot.org/c/coreboot/+/83328/comment/2a425b77_a7ee7038?us… :
PS5, Line 24: return "UNKNOWN";
Most of these default to empty strings. Will this code be changed in the future (e.g. when details are no longer embargoed)? If so, maybe add TODO comments to clarify this is temporary.
If this will not be updated, is there a reason to return `"UNKNOWN"` instead of `""`?
https://review.coreboot.org/c/coreboot/+/83328/comment/abe87f73_1534e9a6?us… :
PS5, Line 52: u8 smbios_chassis_power_cords(void)
: {
: return 1;
: }
Same as default, can be omitted: https://github.com/coreboot/coreboot/blob/c19e32e69d8a9e42346fe81432bbdfc1e…
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Change subject: mb/intel/avenuecity_crb: Update SMBIOS type 0,1,2,3 info
......................................................................
Patch Set 4: Code-Review+2
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Change subject: soc/intel/xeon_sp/gnr: Add dimm_slot configuration
......................................................................
Patch Set 5: Code-Review+2
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Change subject: soc/intel/xeon_sp/Kconfig: Disable ANSI escape code
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Change subject: soc/intel/xeon_sp/Kconfig: Disable ANSI escape code
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83610/comment/36296237_b8608a3b?us… :
PS1, Line 9: To remove ANSI escape sequences (like `ESC [1m`) from boot log.
> Using site-local is actually surprisingly simple. […]
I see, thanks all. The intention was just to make the generated logs more readable pasted in code reviews. The site-local way is good. I will cancel this one.
File src/soc/intel/xeon_sp/Kconfig:
https://review.coreboot.org/c/coreboot/+/83610/comment/735e774e_70682483?us… :
PS1, Line 113: config CONSOLE_USE_ANSI_ESCAPES
> Unless there is a technical requirement to disable this *for the entire Xeon-SP family*, I would hig […]
Acknowledged
https://review.coreboot.org/c/coreboot/+/83610/comment/56c5fc7a_8ca079b0?us… :
PS1, Line 114: bool "Use ANSI escape sequences for console highlighting"
> Repeating the type/prompt is not necessary.
Acknowledged
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Hello Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/xeon_sp/gnr: Add dimm_slot configuration
......................................................................
soc/intel/xeon_sp/gnr: Add dimm_slot configuration
Add sample DIMM slot configuration table for avenuecity CRB
and beechnutcity CRB. This table will be used to fill SMBIOS
type 17 table.
TEST=Boot on intel/avenuecity CRB
It will help to update Locator, Bank Locator and Asset Tag
with the value described in dimm_slot_config_table
Change-Id: I53556c02eb75204994a1bcb42eccb940e83bd532
Signed-off-by: Jincheng Li <jincheng.li(a)intel.com>
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
---
M src/mainboard/intel/avenuecity_crb/Makefile.mk
A src/mainboard/intel/avenuecity_crb/config/dimm_slot.c
M src/mainboard/intel/avenuecity_crb/ramstage.c
M src/mainboard/intel/avenuecity_crb/romstage.c
M src/mainboard/intel/beechnutcity_crb/Makefile.mk
A src/mainboard/intel/beechnutcity_crb/config/dimm_slot.c
M src/mainboard/intel/beechnutcity_crb/ramstage.c
M src/mainboard/intel/beechnutcity_crb/romstage.c
A src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h
9 files changed, 148 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/83326/5
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