coreboot-gerrit July 2024

coreboot-gerrit@coreboot.org

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3025 discussions

[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow PL1/PL2 configuration
by Nico Huber (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Anastasios Koutian, Angel Pons, Patrick Rudolph, Paul Menzel. Nico Huber has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83269?usp=email ) Change subject: cpu/intel/model_206ax: Allow PL1/PL2 configuration ...................................................................... Patch Set 2: Code-Review+1 (2 comments) File src/cpu/intel/model_206ax/chip.h: https://review.coreboot.org/c/coreboot/+/83269/comment/55805558_c6bf4b3c?us… : PS1, Line 46: int pl1; /* Long-term power limit*/ : int pl2; /* Short-term power limit*/ > Done No too strong feelings about this, but I suggest to change it to milliwatts. Having all those zeros attached and having to count them every time when reading a value seems unnecessary. Even if we pretend not to know the `power_unit` (we do know, though, it's always 8 for these chips. and given the 15-bit width of the programmed value, we also know it (the `power_unit`) has to be <1000). Now I've also noticed that the `unsigned int` could easily overflow if `power_unit` was much higher. Microwatts just doesn't feel right. File src/cpu/intel/model_206ax/model_206ax_init.c: https://review.coreboot.org/c/coreboot/+/83269/comment/2beb1107_4dcff92a?us… : PS1, Line 99: dev->upstream->dev->upstream->children->chip_info; > Yeah, you're right. I didn't know we model a single chip as two in the devicetree. Merged CB:83275. Please rebase. -- To view, visit https://review.coreboot.org/c/coreboot/+/83269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Gerrit-Change-Number: 83269 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:37:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: Post-build control of serial
by Martin Roth (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Jérémy Compostella, Simon Glass. Martin Roth has posted comments on this change by Simon Glass. ( https://review.coreboot.org/c/coreboot/+/79594?usp=email ) Change subject: Post-build control of serial ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: I'm not sure if this intends to just silence the serial console or all consoles. It looks like it does different things in different places. By the name, it seems like it should be silencing *all* consoles, and seems to do that in some places by completely suppressing console_init. In others it just looks to disable serial. If this is just intended to silence the uart console, the option should probably be renamed and just placed into the uart code path. -- To view, visit https://review.coreboot.org/c/coreboot/+/79594?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibd867950f117cc6b3dbc582505f3983a0dd714fb Gerrit-Change-Number: 79594 Gerrit-PatchSet: 4 Gerrit-Owner: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:37:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: nb/intel/sandybridge/chipset.cb: Add alias for `cpu_cluster`
by Nico Huber (Code Review) 01 Jul '24

01 Jul '24

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83275?usp=email ) Change subject: nb/intel/sandybridge/chipset.cb: Add alias for `cpu_cluster` ...................................................................... nb/intel/sandybridge/chipset.cb: Add alias for `cpu_cluster` Define a devicetree alias for `cpu_cluster` so that it can be referenced in C code as `DEV_PTR(cpu_bus)`. Change-Id: Id6ead3d98d8fc17cab44ecf0b2af60a23187e036 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83275 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/northbridge/intel/sandybridge/chipset.cb 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb index 22a0e7b..ea917a9 100644 --- a/src/northbridge/intel/sandybridge/chipset.cb +++ b/src/northbridge/intel/sandybridge/chipset.cb @@ -2,7 +2,7 @@ chip northbridge/intel/sandybridge chip cpu/intel/model_206ax - device cpu_cluster 0 on ops sandybridge_cpu_bus_ops end + device cpu_cluster 0 alias cpu_bus on ops sandybridge_cpu_bus_ops end register "acpi_c1" = "CPU_ACPI_C1" register "acpi_c2" = "CPU_ACPI_C3" -- To view, visit https://review.coreboot.org/c/coreboot/+/83275?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id6ead3d98d8fc17cab44ecf0b2af60a23187e036 Gerrit-Change-Number: 83275 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasios Koutian <akoutian2(a)gmail.com>

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[XS] Change in coreboot[main]: nb/intel/sandybridge/chipset.cb: Add alias for `cpu_cluster`
by Nico Huber (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Angel Pons. Nico Huber has posted comments on this change by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/83275?usp=email ) Change subject: nb/intel/sandybridge/chipset.cb: Add alias for `cpu_cluster` ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83275?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id6ead3d98d8fc17cab44ecf0b2af60a23187e036 Gerrit-Change-Number: 83275 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:30:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321"
by Elyes Haouas (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Felix Singer, Martin L Roth, Maximilian Brune. Elyes Haouas has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/83296?usp=email ) Change subject: Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321" ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > if we compile from git source, the version is ok, but if we compile from downloaded tarball, w'll ha […] https://github.com/acpica/acpica/issues/958 -- To view, visit https://review.coreboot.org/c/coreboot/+/83296?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ce0c5798f14162eaa063a9a64e16e6dbbb9e468 Gerrit-Change-Number: 83296 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:28:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[L] Change in coreboot[main]: Introduce a coreboot Control Block (CCB)
by Martin Roth (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Arthur Heymans, Felix Held, Julius Werner, Jérémy Compostella, Karthik Ramasubramanian, Paul Menzel, Simon Glass, Simon Glass. Martin Roth has posted comments on this change by Simon Glass. ( https://review.coreboot.org/c/coreboot/+/77712?usp=email ) Change subject: Introduce a coreboot Control Block (CCB) ...................................................................... Patch Set 12: (1 comment) File src/lib/ccb.c: https://review.coreboot.org/c/coreboot/+/77712/comment/f4e431fb_5a840602?us… : PS12, Line 82: BUG() return NULL after this to avoid returning an uninitialized ccb variable? -- To view, visit https://review.coreboot.org/c/coreboot/+/77712?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I04e946b33035a493e833500351a0483761252613 Gerrit-Change-Number: 77712 Gerrit-PatchSet: 12 Gerrit-Owner: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:24:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321"
by Elyes Haouas (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Felix Singer, Martin L Roth, Maximilian Brune. Elyes Haouas has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/83296?usp=email ) Change subject: Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321" ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > I looked into the tarball and it seems they actually packaged the sources from 20230628. if we compile from git source, the version is ok, but if we compile from downloaded tarball, w'll have " ASL+ Optimizing Compiler/Disassembler version 20230628" -- To view, visit https://review.coreboot.org/c/coreboot/+/83296?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ce0c5798f14162eaa063a9a64e16e6dbbb9e468 Gerrit-Change-Number: 83296 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:20:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com>

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[XS] Change in coreboot[main]: test build IASL
by Elyes Haouas (Code Review) 01 Jul '24

01 Jul '24

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/83297?usp=email ) Change subject: test build IASL ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/83297?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05a25cefe042411c5ea94b8175c109574ee8ee00 Gerrit-Change-Number: 83297 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>

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[S] Change in coreboot[main]: mb/google/geralt: change config to FW_config for support TAS2563 audi...
by Yu-Ping Wu (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Rui Zhou, cong yang. Yu-Ping Wu has posted comments on this change by Rui Zhou. ( https://review.coreboot.org/c/coreboot/+/83287?usp=email ) Change subject: mb/google/geralt: change config to FW_config for support TAS2563 audio amp ...................................................................... Patch Set 9: (1 comment) File src/mainboard/google/geralt/chromeos.c: https://review.coreboot.org/c/coreboot/+/83287/comment/06a741ad_87cc8168?us… : PS7, Line 64: fw_config_probe > sorry,I use vim and vscode to view it locally and it is normal, but after submitting it... […] Please set tab width to 8 for coreboot (add `set tabstop=8` in .vimrc). -- To view, visit https://review.coreboot.org/c/coreboot/+/83287?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9f0cbc30dd950b85581fc1924fa351efe1e0aab Gerrit-Change-Number: 83287 Gerrit-PatchSet: 9 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 15:05:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: test build IASL
by Elyes Haouas (Code Review) 01 Jul '24

01 Jul '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83297?usp=email ) Change subject: test build IASL ...................................................................... test build IASL Change-Id: I05a25cefe042411c5ea94b8175c109574ee8ee00 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix2-20240321_iasl.patch D util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum A util/crossgcc/sum/acpica-unix2-20240321.tar.gz.cksum 4 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/83297/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index f4379ad..ab9e4573 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -52,7 +52,7 @@ MPC_ARCHIVE="mpc-${MPC_VERSION}.tar.gz" GCC_ARCHIVE="gcc-${GCC_VERSION}.tar.xz" BINUTILS_ARCHIVE="binutils-${BINUTILS_VERSION}.tar.xz" -IASL_ARCHIVE="acpica-unix-${IASL_VERSION}.tar.gz" +IASL_ARCHIVE="acpica-unix2-${IASL_VERSION}.tar.gz" # CLANG toolchain FILE locations LLD_ARCHIVE="lld-${CLANG_VERSION}.src.tar.xz" LLVM_ARCHIVE="llvm-${CLANG_VERSION}.src.tar.xz" @@ -74,7 +74,7 @@ MPC_BASE_URL="https://ftpmirror.gnu.org/mpc" GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}" BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils" -IASL_BASE_URL="https://downloadmirror.intel.com/819451" +IASL_BASE_URL="https://downloadmirror.intel.com/819452" # CLANG toolchain archive locations LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERS…" CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERS…" @@ -100,7 +100,7 @@ GCC_DIR="gcc-${GCC_VERSION}" # shellcheck disable=SC2034 BINUTILS_DIR="binutils-${BINUTILS_VERSION}" -IASL_DIR="acpica-unix-${IASL_VERSION}" +IASL_DIR="acpica-unix2-${IASL_VERSION}" # CLANG toolchain directories LLD_DIR="lld-${CLANG_VERSION}.src" LLVM_DIR="llvm-${CLANG_VERSION}.src" diff --git a/util/crossgcc/patches/acpica-unix-20240321_iasl.patch b/util/crossgcc/patches/acpica-unix2-20240321_iasl.patch similarity index 100% rename from util/crossgcc/patches/acpica-unix-20240321_iasl.patch rename to util/crossgcc/patches/acpica-unix2-20240321_iasl.patch diff --git a/util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum b/util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum deleted file mode 100644 index e7b7afe..0000000 --- a/util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -19f5b03de6de059a95432d17ed24095262a97aba tarballs/acpica-unix-20240321.tar.gz diff --git a/util/crossgcc/sum/acpica-unix2-20240321.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20240321.tar.gz.cksum new file mode 100644 index 0000000..9c6ae81 --- /dev/null +++ b/util/crossgcc/sum/acpica-unix2-20240321.tar.gz.cksum @@ -0,0 +1 @@ +78cd5f502671a56fa3e3bbec5d9879a41be6a028 tarballs/acpica-unix2-20240321.tar.gz -- To view, visit https://review.coreboot.org/c/coreboot/+/83297?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05a25cefe042411c5ea94b8175c109574ee8ee00 Gerrit-Change-Number: 83297 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>

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coreboot-gerrit July 2024