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Change subject: console: Fix I2C/SMBus console if it's the only slow one
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
File src/include/console/console.h:
https://review.coreboot.org/c/coreboot/+/82761/comment/9d114b01_05863640?us… :
PS1, Line 72: #define HAS_ONLY_FAST_CONSOLES !(CONFIG(SPKMODEM) || CONFIG(CONSOLE_QEMU_DEBUGCON) || \
: CONFIG(CONSOLE_SERIAL) || CONFIG(CONSOLE_NE2K) || CONFIG(CONSOLE_USB) || \
: CONFIG(EM100PRO_SPI_CONSOLE) || CONFIG(CONSOLE_SPI_FLASH) || \
: CONFIG(CONSOLE_SYSTEM76_EC) || CONFIG(CONSOLE_AMD_SIMNOW) || \
: CONFIG(CONSOLE_I2C_SMBUS))
> One could still miss to select it. […]
It would be a bit harder to miss when copy-pasting another console as example 😜
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Change subject: mainboard/dell: Add new mainboard XPS 8300 (Sandy Bridge)
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Patch Set 16: Code-Review+2
(1 comment)
Patchset:
PS16:
Otherwise I think it's good!
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Change subject: mb/asrock/z97_extreme6: Fix EDID mapping for DVI-I
......................................................................
mb/asrock/z97_extreme6: Fix EDID mapping for DVI-I
This board has a DVI-I connector, which supports both digital and analog
display outputs. The I2C bus to retrieve the EDID is shared between both
outputs, so `select GFX_GMA_ANALOG_I2C_HDMI_B` to describe this.
Can't currently test this due to lack of hardware.
Change-Id: Ib8239917e2f7ee5bb982621752ec406c2d3ca302
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82753
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---
M src/mainboard/asrock/z97_extreme6/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
Approvals:
Nico Huber: Looks good to me, approved
Martin L Roth: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/asrock/z97_extreme6/Kconfig b/src/mainboard/asrock/z97_extreme6/Kconfig
index d47e3a2..3cef429 100644
--- a/src/mainboard/asrock/z97_extreme6/Kconfig
+++ b/src/mainboard/asrock/z97_extreme6/Kconfig
@@ -5,6 +5,7 @@
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_8192
+ select GFX_GMA_ANALOG_I2C_HDMI_B
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select INTEL_GMA_HAVE_VBT
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Change subject: mb/asrock/z97_extreme6: Fix EDID mapping for DVI-I
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82753/comment/e4496142_c0f0d86d?us… :
PS1, Line 13: Not yet tested.
> No, updated the commit message.
Can't test either, but the manual also says it's DVI-I. So chances
of regression are pretty low.
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Change subject: nb/via/cx700: Implement FSB tuning
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82769/comment/d7bed464_b9c3dc32?us… :
PS2, Line 17: seems unclear if it was put there intentionally.
> If this soft reset doesn't clear the FSB settings, I imagine it's to help commit the settings. […]
I should probably check what sticks. I know at least the reset bit sticks
because that's what made the original code work: it only resets when changing
it from 0 to 1. The original code just went through the whole list again,
second time without reset. It could still make sense if it was on purpose,
it's actually quite elegant if one wanted to compact the code as much as
possible.
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Change subject: nb/via/cx700: Implement raminit
......................................................................
Patch Set 3:
(1 comment)
File src/northbridge/via/cx700/raminit.h:
https://review.coreboot.org/c/coreboot/+/82770/comment/19a9793a_5a698497?us… :
PS2, Line 7: void sdram_enable(const struct dram_cfg *);
> Should be easy to fix.
You mean I should try to fix checkpatch? :D
Sorry, but I'm all against it when one would just repeat the type name.
I could also name it `x` and checkpatch would probably be happy, that
can't be the point of it.
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Change subject: mb/via/epia-ex: Turn PCI devices on
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/via/epia-ex/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/83391/comment/b54dff5c_0f4cb20f?us… :
PS1, Line 11:
IIRC, there was an issue in libpayload when leaving the `north_pci` off.
And it's quirky hardware (something wrong with the PCI BAR registers),
so this needs a little more work.
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Change subject: cpu/via/c7: Compress ramstage with LZ4 by default
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82772/comment/0a9fa5b2_fa077a42?us… :
PS2, Line 9: It's a slow CPU.
> How much faster is LZ4 vs LZMA?
In my user-space, orders of magnitude IIRC. I'll check when I have the board
at hand. I also had some issues caching romstage, so maybe this was another
reason (the LZMA decoder is also huge in comparison).
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Change subject: nb/via/cx700: Implement raminit
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
My intention was to push something first that is working and as close
as possible to the original. I could do refactorings as part of this
commit, or separately. Whatever you prefer. (I'd prefer to keep more
information in the commit history, but understand very well that
reviewing like that can be a pain.)
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