coreboot-gerrit July 2024

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[M] Change in coreboot[main]: mb/google/poppy: Drop superfluous devices from devicetree
by Felix Singer (Code Review) 15 Jul '24

15 Jul '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83454?usp=email ) Change subject: mb/google/poppy: Drop superfluous devices from devicetree ...................................................................... mb/google/poppy: Drop superfluous devices from devicetree In order to clean up a bit, drop devices which are equivalent to the ones from chipset devicetree. Change-Id: Ief199db47fc529c510709ac37be6014b63244e84 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83454 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb 7 files changed, 0 insertions(+), 177 deletions(-) Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 48b9a920..04df902 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -202,11 +202,9 @@ }" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end device ref imgu on end - device ref ish off end device ref south_xhci on register "usb2_ports" = "{ [0] = USB2_PORT_LONG(OC0), // Type-C Port 1 @@ -262,7 +260,6 @@ device i2c 0x49 on end end end - device ref i2c1 off end device ref i2c2 on chip drivers/i2c/hid register "generic.hid" = ""ACPI0C50"" @@ -275,13 +272,7 @@ end device ref i2c3 on end # Camera device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end - device ref i2c5 off end device ref i2c4 on chip drivers/i2c/max98373 register "vmon_slot_no" = "4" @@ -330,19 +321,7 @@ device pci 00.0 on end end end - device ref pcie_rp2 off end - device ref pcie_rp3 off end - device ref pcie_rp4 off end - device ref pcie_rp5 off end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end - device ref pcie_rp9 off end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end device ref uart0 on end - device ref uart1 off end device ref gspi0 on chip drivers/spi/acpi register "hid" = "ACPI_DT_NAMESPACE_HID" @@ -351,10 +330,7 @@ device spi 0 on end end end - device ref gspi1 off end device ref emmc on end - device ref sdio off end - device ref sdxc off end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" @@ -366,11 +342,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 17eee30..feea932 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -217,7 +217,6 @@ register "sdcard_cd_gpio" = "GPP_E15" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end device ref imgu on end @@ -293,11 +292,6 @@ end end device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end device ref i2c5 on chip drivers/i2c/max98927 @@ -340,23 +334,8 @@ device pci 00.0 on end end end - device ref pcie_rp2 off end - device ref pcie_rp3 off end - device ref pcie_rp4 off end - device ref pcie_rp5 off end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end - device ref pcie_rp9 off end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end device ref uart0 on end - device ref uart1 off end - device ref gspi0 off end - device ref gspi1 off end device ref emmc on end - device ref sdio off end device ref sdxc on end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f @@ -369,11 +348,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index b970077..139a3c8 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -211,10 +211,8 @@ }" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end - device ref imgu off end device ref south_xhci on register "usb2_ports" = "{ [0] = USB2_PORT_LONG(OC0), // Type-C Port 0 @@ -235,7 +233,6 @@ end device ref south_xdci on end device ref thermal on end - device ref cio off end device ref i2c0 on chip drivers/i2c/generic register "hid" = ""ELAN0001"" @@ -365,17 +362,8 @@ end end device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end - device ref i2c5 off end - device ref i2c4 off end device ref pcie_rp1 on end - device ref pcie_rp2 off end - device ref pcie_rp3 off end device ref pcie_rp4 on # x1 register "PcieRpEnable[3]" = "1" @@ -398,9 +386,6 @@ register "PcieRpAdvancedErrorReporting[4]" = "1" register "PcieRpLtrEnable[4]" = "1" end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end device ref pcie_rp9 on # x2 register "PcieRpEnable[8]" = "1" @@ -410,11 +395,7 @@ register "PcieRpAdvancedErrorReporting[8]" = "1" register "PcieRpLtrEnable[8]" = "1" end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end device ref uart0 on end - device ref uart1 off end device ref gspi0 on chip drivers/spi/acpi register "hid" = "ACPI_DT_NAMESPACE_HID" @@ -435,8 +416,6 @@ end # FPMCU end device ref emmc on end - device ref sdio off end - device ref sdxc off end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" @@ -448,11 +427,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 92d72f8..363b614 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -247,7 +247,6 @@ register "sdcard_cd_gpio" = "GPP_E15" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end device ref imgu on end @@ -326,11 +325,6 @@ end end device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end device ref i2c5 on chip drivers/generic/max98357a @@ -378,23 +372,8 @@ device pci 00.0 on end end end - device ref pcie_rp2 off end - device ref pcie_rp3 off end - device ref pcie_rp4 off end - device ref pcie_rp5 off end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end - device ref pcie_rp9 off end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end device ref uart0 on end - device ref uart1 off end - device ref gspi0 off end - device ref gspi1 off end device ref emmc on end - device ref sdio off end device ref sdxc on end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f @@ -407,11 +386,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 27b2f0b..5f94e93 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -204,7 +204,6 @@ }" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end device ref imgu on end @@ -286,14 +285,8 @@ register "proxraw_strength" = "0" end end - device ref i2c2 off end device ref i2c3 on end device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end device ref i2c5 on chip drivers/i2c/sx9310 @@ -343,13 +336,6 @@ device pci 00.0 on end end end - device ref pcie_rp2 off end - device ref pcie_rp3 off end - device ref pcie_rp4 off end - device ref pcie_rp5 off end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end device ref pcie_rp9 on # x2 register "PcieRpEnable[8]" = "1" @@ -359,11 +345,6 @@ register "PcieRpAdvancedErrorReporting[8]" = "1" register "PcieRpLtrEnable[8]" = "1" end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end - device ref uart0 off end - device ref uart1 off end device ref gspi0 on chip drivers/spi/acpi register "hid" = "ACPI_DT_NAMESPACE_HID" @@ -384,8 +365,6 @@ end # FPMCU end device ref emmc on end - device ref sdio off end - device ref sdxc off end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" @@ -397,11 +376,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 8c8eb7f..3743385 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -198,10 +198,8 @@ register "sdcard_cd_gpio" = "GPP_E15" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end - device ref imgu off end device ref south_xhci on register "usb2_ports" = "{ [0] = USB2_PORT_SHORT(OC0), // Type-C Port 1 @@ -250,9 +248,7 @@ end end end - device ref south_xdci off end device ref thermal on end - device ref cio off end device ref i2c0 on chip drivers/i2c/hid register "generic.hid" = ""PNP0C50"" @@ -278,14 +274,7 @@ device i2c 15 on end end end - device ref i2c2 off end - device ref i2c3 off end device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end device ref i2c5 on chip drivers/i2c/max98927 @@ -324,7 +313,6 @@ device i2c 1A on end end end - device ref i2c4 off end device ref pcie_rp1 on register "PcieRpEnable[0]" = "1" register "PcieRpClkReqSupport[0]" = "1" @@ -337,19 +325,7 @@ device pci 00.0 on end end end - device ref pcie_rp2 off end - device ref pcie_rp3 off end - device ref pcie_rp4 off end - device ref pcie_rp5 off end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end - device ref pcie_rp9 off end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end device ref uart0 on end - device ref uart1 off end device ref gspi0 on chip drivers/spi/acpi register "hid" = "ACPI_DT_NAMESPACE_HID" @@ -358,9 +334,7 @@ device spi 0 on end end end - device ref gspi1 off end device ref emmc on end - device ref sdio off end device ref sdxc on end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f @@ -373,11 +347,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 5cb0f7d..2d1a509 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -227,7 +227,6 @@ register "sdcard_cd_gpio" = "GPP_E15" device domain 0 on - device ref system_agent on end device ref igpu on end device ref sa_thermal on end device ref imgu on end @@ -274,13 +273,7 @@ end end device ref i2c2 on end - device ref i2c3 off end device ref heci1 on end - device ref heci2 off end - device ref csme_ider off end - device ref csme_ktr off end - device ref heci3 off end - device ref sata off end device ref uart2 on end device ref i2c5 on chip drivers/i2c/max98927 @@ -323,23 +316,8 @@ device pci 00.0 on end end end - device ref pcie_rp2 off end - device ref pcie_rp3 off end - device ref pcie_rp4 off end - device ref pcie_rp5 off end - device ref pcie_rp6 off end - device ref pcie_rp7 off end - device ref pcie_rp8 off end - device ref pcie_rp9 off end - device ref pcie_rp10 off end - device ref pcie_rp11 off end - device ref pcie_rp12 off end device ref uart0 on end - device ref uart1 off end - device ref gspi0 off end - device ref gspi1 off end device ref emmc on end - device ref sdio off end device ref sdxc on end device ref lpc_espi on # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f @@ -352,11 +330,8 @@ device pnp 0c09.0 on end end end - device ref p2sb on end - device ref pmc on end device ref hda on end device ref smbus on end device ref fast_spi on end - device ref gbe off end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/83454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief199db47fc529c510709ac37be6014b63244e84 Gerrit-Change-Number: 83454 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: mb/google/poppy: Drop superfluous devices from devicetree
by Eric Lai (Code Review) 15 Jul '24

15 Jul '24

Attention is currently required from: Felix Singer. Eric Lai has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/83454?usp=email ) Change subject: mb/google/poppy: Drop superfluous devices from devicetree ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief199db47fc529c510709ac37be6014b63244e84 Gerrit-Change-Number: 83454 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Comment-Date: Mon, 15 Jul 2024 02:04:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/dedede/variants/awasuki: Generate 3 RAM IDs
by Eric Lai (Code Review) 15 Jul '24

15 Jul '24

Attention is currently required from: Karthik Ramasubramanian, Lawrence Chang, Tongtong Pan. Eric Lai has posted comments on this change by Tongtong Pan. ( https://review.coreboot.org/c/coreboot/+/83427?usp=email ) Change subject: mb/google/dedede/variants/awasuki: Generate 3 RAM IDs ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83427/comment/0ee53edd_a2e8eb05?us… : PS5, Line 7: variants var , still not changed. -- To view, visit https://review.coreboot.org/c/coreboot/+/83427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9a03c86770101ec70c2ee5d6b914313c1bf23b5f Gerrit-Change-Number: 83427 Gerrit-PatchSet: 5 Gerrit-Owner: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 15 Jul 2024 02:03:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: util/liveiso/nixos: Install TPM related tools
by Felix Singer (Code Review) 15 Jul '24

15 Jul '24

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83463?usp=email ) Change subject: util/liveiso/nixos: Install TPM related tools ...................................................................... util/liveiso/nixos: Install TPM related tools Change-Id: Idbf4f40f495fac6c08a9017bfbff25043d7fbb82 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M util/liveiso/nixos/common.nix 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/83463/1 diff --git a/util/liveiso/nixos/common.nix b/util/liveiso/nixos/common.nix index b174aca..d461976 100644 --- a/util/liveiso/nixos/common.nix +++ b/util/liveiso/nixos/common.nix @@ -165,6 +165,8 @@ testdisk tmate tmux + tpm-tools + tpm2-tools uefitool uefitoolPackages.old-engine unzip -- To view, visit https://review.coreboot.org/c/coreboot/+/83463?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idbf4f40f495fac6c08a9017bfbff25043d7fbb82 Gerrit-Change-Number: 83463 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>

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[S] Change in coreboot[main]: soc/intel/common: add CPU and PCIe IDs for Snow Ridge platform
by Name of user not set (Code Review) 15 Jul '24

15 Jul '24

Attention is currently required from: Jérémy Compostella, Paul Menzel, Shuo Liu, جوكر الطويل. yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83314?usp=email ) Change subject: soc/intel/common: add CPU and PCIe IDs for Snow Ridge platform ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83314/comment/cdd56ecf_27d2e091?us… : PS3, Line 8: > Please add the source for these ids, like datasheet name, revision. These IDs are described in the EDS file of Snow Ridge SoC, I've added it in the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/83314?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3f5d612765bbe9adffe0b6c7a4151f32b33e88b4 Gerrit-Change-Number: 83314 Gerrit-PatchSet: 5 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: جوكر الطويل <goker.g700(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: جوكر الطويل <goker.g700(a)gmail.com> Gerrit-Comment-Date: Sun, 14 Jul 2024 23:52:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XL] Change in coreboot[main]: vc/intel/fsp/fsp2_0/snowridge: Add FSP headers for Snow Ridge SoC
by Name of user not set (Code Review) 15 Jul '24

15 Jul '24

Attention is currently required from: Jérémy Compostella, Paul Menzel, Shuo Liu. yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83192?usp=email ) Change subject: vc/intel/fsp/fsp2_0/snowridge: Add FSP headers for Snow Ridge SoC ...................................................................... Patch Set 6: (1 comment) File src/vendorcode/intel/fsp/fsp2_0/snowridge/FspmUpd.h: https://review.coreboot.org/c/coreboot/+/83192/comment/c7568be9_a6d536c5?us… : PS4, Line 3: Copyright (c) 2022, Intel Corporation. All rights reserved.<BR> > Is that up to date? I've replaced FSP headers with the latest one. -- To view, visit https://review.coreboot.org/c/coreboot/+/83192?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I333b137c1dc08a3c06bdd3f7a78ca44a5dd043cc Gerrit-Change-Number: 83192 Gerrit-PatchSet: 6 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Comment-Date: Sun, 14 Jul 2024 23:51:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: util/cbfstool: Add eventLog support for ELOG_TYPE_FW_LATE_SOL
by Subrata Banik (Code Review) 14 Jul '24

14 Jul '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83462?usp=email ) Change subject: util/cbfstool: Add eventLog support for ELOG_TYPE_FW_LATE_SOL ...................................................................... util/cbfstool: Add eventLog support for ELOG_TYPE_FW_LATE_SOL In order to support logging events for when we show early signs of life to the user during CSE FW syncs add support for the ELOG_TYPE_FW_LATE_SOL type. BUG=b:305898363 TEST=verify event shows in eventlog CSE sync. Change-Id: I862db946f6ff622ac83072e6bf27832732c0c318 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M util/cbfstool/eventlog.c 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/83462/1 diff --git a/util/cbfstool/eventlog.c b/util/cbfstool/eventlog.c index e090ebe..5e76df2 100644 --- a/util/cbfstool/eventlog.c +++ b/util/cbfstool/eventlog.c @@ -169,6 +169,7 @@ {ELOG_TYPE_PSR_DATA_BACKUP, "PSR data backup"}, {ELOG_TYPE_PSR_DATA_LOST, "PSR data lost"}, {ELOG_TYPE_FW_SPLASH_SCREEN, "Firmware Splash Screen"}, + {ELOG_TYPE_FW_LATE_SOL, "Late Sign of Life "}, {ELOG_TYPE_EOL, "End of log"}, }; @@ -483,6 +484,11 @@ {0, NULL}, }; + static const struct valstr late_sol_path_types[] = { + {ELOG_FW_LATE_SOL_CSE_SYNC, "CSE Sync Late SOL Screen Shown"}, + {0, NULL}, + }; + size_t elog_type_to_min_size[] = { [ELOG_TYPE_LOG_CLEAR] = sizeof(uint16_t), [ELOG_TYPE_BOOT] = sizeof(uint32_t), @@ -504,6 +510,7 @@ [ELOG_TYPE_FW_EARLY_SOL] = sizeof(uint8_t), [ELOG_TYPE_PSR_DATA_BACKUP] = sizeof(uint8_t), [ELOG_TYPE_FW_SPLASH_SCREEN] = sizeof(uint8_t), + [ELOG_TYPE_FW_LATE_SOL] = sizeof(uint8_t), [0xff] = 0, }; @@ -670,6 +677,11 @@ eventlog_printf("%s", *fw_splash_screen_event ? "Enabled" : "Disabled"); break; } + case ELOG_TYPE_FW_LATE_SOL: { + const uint8_t *sol_event = event_get_data(event); + eventlog_printf("%s", val2str(*sol_event, late_sol_path_types)); + break; + } default: break; } -- To view, visit https://review.coreboot.org/c/coreboot/+/83462?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I862db946f6ff622ac83072e6bf27832732c0c318 Gerrit-Change-Number: 83462 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: commonlib: Add ELOG_TYPE_FW_LATE_SOL eventLog type
by Subrata Banik (Code Review) 14 Jul '24

14 Jul '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83461?usp=email ) Change subject: commonlib: Add ELOG_TYPE_FW_LATE_SOL eventLog type ...................................................................... commonlib: Add ELOG_TYPE_FW_LATE_SOL eventLog type Add a new eventLog type of ELOG_TYPE_FW_LATE_SOL to support logging when we show late (from payload) Signs Of Life (SOL) to the user. BUG=b:305898363 TEST=Event shows in eventlog tool after CSE sync: ``` Late Sign of Life | CSE Sync Late SOL Screen Shown ``` Change-Id: Ibbe9f37a791e5c2a0c6e982942cf3043a2bd4b45 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/commonlib/bsd/include/commonlib/bsd/elog.h 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/83461/1 diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h index 31bb8fc..efc4d6e 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/elog.h +++ b/src/commonlib/bsd/include/commonlib/bsd/elog.h @@ -381,6 +381,12 @@ */ #define ELOG_TYPE_FW_SPLASH_SCREEN 0xbb +/* + * Events related to CSE sync from payload + */ +#define ELOG_TYPE_FW_LATE_SOL 0xbc +#define ELOG_FW_LATE_SOL_CSE_SYNC 0x0 + /* Only the 7-LSB are used for size */ #define ELOG_MAX_EVENT_SIZE 0x7F -- To view, visit https://review.coreboot.org/c/coreboot/+/83461?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibbe9f37a791e5c2a0c6e982942cf3043a2bd4b45 Gerrit-Change-Number: 83461 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

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[M] Change in coreboot[main]: Makefile.mk: Reorganize CFLAGS_common
by Felix Singer (Code Review) 14 Jul '24

14 Jul '24

Attention is currently required from: Elyes Haouas, Martin L Roth. Felix Singer has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/83452?usp=email ) Change subject: Makefile.mk: Reorganize CFLAGS_common ...................................................................... Patch Set 4: (2 comments) File Makefile.mk: https://review.coreboot.org/c/coreboot/+/83452/comment/7a4ba1f5_df1f33ca?us… : PS4, Line 507: # Options controlling the kind of output I like that the warning options are reorganized and sorted, but not sure if it really makes sense to give each group a comment, since some only have one option anyway. I would remove the comments. https://review.coreboot.org/c/coreboot/+/83452/comment/2dafc994_c34b16ae?us… : PS4, Line 543: CFLAGS_common += -g Maybe move this before the warning options, so that the list continues with them. -- To view, visit https://review.coreboot.org/c/coreboot/+/83452?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3216ef2e0b3cd25f343939d5b9ef932f2f91e56c Gerrit-Change-Number: 83452 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 14 Jul 2024 19:49:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: util: Add hda-decoder
by Felix Singer (Code Review) 14 Jul '24

14 Jul '24

Attention is currently required from: Michael Niewöhner, Nicholas Sudsgaard, Ron Minnich. Felix Singer has posted comments on this change by Nicholas Sudsgaard. ( https://review.coreboot.org/c/coreboot/+/80470?usp=email ) Change subject: util: Add hda-decoder ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80470?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib4fb652e178517b2b7aceaac8be005c5b2d3b03e Gerrit-Change-Number: 80470 Gerrit-PatchSet: 8 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Sun, 14 Jul 2024 19:11:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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